Cirrus-logic EP93xx Manuel d'utilisateur télécharger pdf (Page 286)

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8-22 DS785UM1

Graphics Accelerator

EP93xx User’s Guide

8.7 Registers

Note: Graphics Accelerator registers are intended to be word accessed only. Since the least

significant bytes of the address bus are not decoded, byte and half word accesses are

illegal and may yield unpredictable results.

Table 8-22. Graphics Accelerator Registers

Address Name

locked

Type Size Description

0x8004_0000 “SRCPIXELSTRT” No Read/Write 5 bits Source Pixel Start Register

0x8004_0004 “DESTPIXELSTRT” No Read/Write 5 + 5 bits Destination Pixel Start/End Register

0x8004_0008 “BLKSRCSTRT” No Read/Write 32 bits Block Source Word Address Start Register

0x8004_000C “BLKDESTSTRT” No Read/Write 32 bits Block Destination Word Address Start Register

0x8004_0010 “BLKSRCWIDTH” No Read/Write 12 bits Block Function Source Width Register

0x8004_0014

SRCLINELENGTH“S

RCLINELENGTH”

No Read/Write 12 bits Block Source Line Length Register

0x8004_0018 “BLKDESTWIDTH” No Read/Write 12 bits Block Function Destination Width Register

0x8004_001C “BLKDESTHEIGHT” No Read/Write 11 bits Block Function Destination Height Register

0x8004_0020 “DESTLINELENGTH” No Read/Write 12 bits Destination Line Length Register

0x8004_0024 “BLOCKCTRL” No Read/Write 16 bits Block Function Control Register

0x8004_0028 “TRANSPATTRN” No Read/Write 24 bits Block Function Transparency Register

0x8004_002C “BLOCKMASK” No Read/Write 24 bits Block Function Mask Register

0x8004_0030 “BACKGROUND” No Read/Write 24 bits Block Function Background Register

0x8004_0034 “LINEINC” No Read/Write 12 + 12 bits Line Draw Increment Register

0x8004_0038 “LINEINIT” No Read/Write 12 + 12 bits Line Draw Initialization Register

0x8004_003C “LINEPATTRN” No Read/Write 20 bits Line Pattern Register

1 2 ... 281 282 283 284 285 286 287 288 289 290 291 ... 823 824

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Cirrus-logic EP93xx Manuel d'utilisateur Page 286

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