Cirrus-logic CS4362 Manuel d'utilisateur télécharger pdf (Page 10)

10 DS257F2

CS4362

DSD - SWITCHING CHARACTERISTICS

=-10°C to 70°C; Logic 0 = GND; VLS = 1.8 V to 5.5 V; Logic 1 = VLS Volts; C

=30pF)

Note:

18. Min is 4 times 64x DSD or 2 times 128x DSD, and Max is 12 times 64x DSD or 6 times 128x DSD. The

proper MCLK to DSD_SCLK ratio must be set either by the DIF registers or the M0:2 pins

Parameter Symbol Min Typ Max Unit

Master Clock Frequency (Note 18) 4.096 - 38.4 MHz

MCLK Duty Cycle (All DSD

modes)

40 50 60 %

DSD_SCLK Pulse Width Low t

sclkl

20 - - ns

DSD_SCLK Pulse Width High t

sclkh

20 - - ns

DSD_SCLK Frequency (64x Oversam-

pled)

(128x Oversampled)

1.024

2.048

3.2

6.4

MHz

DSD_L / _R valid to DSD_SCLK rising setup time t

sdlrs

20 - - ns

DSD_SCLK rising to DSD_L or DSD_R hold time t

sdh

20 - - ns

sclkh

sclkl

DSD_L, DSD_R

DSD_SCLK

sdlrs

sdh

Figure 2. Direct Stream Digital - Serial Audio Input Timing

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 41 42

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Cirrus-logic CS4362 Manuel d'utilisateur Page 10