Cirrus-logic CS4385 Manuel d'utilisateur

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Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
http://www.cirrus.com
114 dB, 192 kHz 8-Channel D/A Converter
Features
Advanced Multi-bit Delta Sigma Architecture
24-bit Conversion
Automatic Detection of Sample Rates up to
192 kHz
114 dB Dynamic Range
-100 dB THD+N
Direct Stream Digital Mode
Non-Decimating Volume Control
On-Chip 50 kHz Filter
Matched PCM and DSD Analog Output
Levels
Compatible with Industry-Standard Time
Division Multiplexed (TDM) Serial Interface
Selectable Digital Filters
Volume Control with 1/2-dB Step Size and Soft
Ramp
Low Clock-Jitter Sensitivity
+5 V Analog Supply, +2.5 V Digital Supply
Separate 1.8 to 5 V Logic Supplies for the
Control and Serial Ports
Description
The CS4385 is a complete 8-channel digital-to-analog
system. This D/A system includes digital de-emphasis,
half-dB step size volume control, ATAPI channel mix-
ing, selectable fast and slow digital interpolation filters
followed by an oversampled, multi-bit delta sigma mod-
ulator which includes mismatch-shaping technology
that eliminates distortion due to capacitor mismatch.
Following this stage is a multi-element switched capac-
itor stage and low-pass filter with differential analog
outputs.
The CS4385 also has a proprietary DSD processor
which allows for volume control and 50 kHz on-chip fil-
tering without an intermediate decimation stage. It also
offers an optional path for direct DSD conversion by di-
rectly using the multi-element switched capacitor array.
The CS4385 is available in a 48-pin LQFP package in
both Commercial (-40°C to +85°C) and Automotive
(-40°C to +105°C) grades. The CDB4385 Customer
Demonstration board is also available for device evalu-
ation and implementation suggestions. Please see
“Ordering Information” on page 54 for complete details.
The CS4385 accepts PCM data at sample rates from
4 kHz to 216 kHz, DSD audio data, and delivers excel-
lent sound quality. These features are ideal for multi-
channel audio systems, including SACD players, A/V
receivers, digital TV’s, mixing consoles, effects proces-
sors, sound cards, and automotive audio systems.
Control Port Supply = 1.8 V to 5 V
Register/Hardware
Configuration
Internal Voltage
Reference
Reset
Serial Interface
Level Translator
Level Translator
TDM Serial
Audio Input
Digital Supply = 2.5 V
Hardware Mode or
I
2
C/SPI Software Mode
Control Data
Analog Supply = 5 V
Eight Channels
of Differential
Outputs
8
8
PCM Serial
Audio Input
Volume
Controls
Digital
Filters
Switch-Cap
DAC and
Analog Filters
Multi-bit ΔΣ
Modulators
DSD Audio
Input
DSD Processor
-Volume control
-50 kHz filter
External Mute
Control
Mute Signals
2
8
Serial Audio Port
Supply = 1.8 V to 5 V
FEB '08
DS671F2
CS4385
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Résumé du contenu

Page 1 - Description

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.com114 dB, 192 kHz 8-Channel D/A ConverterFeatures Advanced Multi-bit Delta

Page 2 - TABLE OF CONTENTS

10 DS671F2CS4385DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DQZ) Test Conditions (unless otherwise specified): VA = 4.75 to 5.25 V; VLS = 1.71 to 5.25 V

Page 3

DS671F2 11CS4385POWER AND THERMAL CHARACTERISTICS Notes:4. Current consumption increases with increasing Fs within a given speed mode and is signal

Page 4 - LIST OF FIGURES

12 DS671F2CS4385COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSEThe filter characteristics have been normalized to the sample rate (Fs) and

Page 5 - LIST OF TABLES

DS671F2 13CS4385COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (CONTINUED)DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSEParame

Page 6 - 1. PIN DESCRIPTION

14 DS671F2CS4385DIGITAL CHARACTERISTICSNotes:13. Any pin except supplies. Transient currents of up to ±100 mA on the input pins will not cause SCR lat

Page 7

DS671F2 15CS4385SWITCHING CHARACTERISTICS - PCMInputs: Logic 0 = GND, Logic 1 = VLS, CL = 20 pF. Notes:14. After powering up, RST should be held low

Page 8 - ABSOLUTE MAXIMUM RATINGS

16 DS671F2CS4385SWITCHING CHARACTERISTICS - DSDLogic 0 = GND; Logic 1 = VLS; CL=20pF. Parameter Symbol Min Typ Max UnitMCLK Duty Cycle 40 - 60 %DS

Page 9

DS671F2 17CS4385SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMATInputs: Logic 0 = GND, Logic 1 = VLC, CL=20pF.Notes:18. Data must be held for suf

Page 10

18 DS671F2CS4385SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT Inputs: Logic 0 = GND, Logic 1 = VLC, CL=20pF.Notes:19. tspi is only needed befo

Page 11

DS671F2 19CS43853. TYPICAL CONNECTION DIAGRAMVLSMCLKVDAOUTA1+8320.1 µF+1 µF+2.5 VSDIN191 µF0.1 µF++2021FILT+VQ76LRCKSCLKSDIN3SDIN239400.1 µF47 µFVA0.1

Page 12 - See Note 12

2 DS671F2CS4385TABLE OF CONTENTS1. PIN DESCRIPTION ...

Page 13 - (CONTINUED)

20 DS671F2CS4385 VLSCS4385MCLKVDAOUTA1+8320.1 µF+1 µF+2.5 VSDIN191 µF0

Page 14 - DIGITAL CHARACTERISTICS

DS671F2 21CS43854. APPLICATIONS The CS4385 serially accepts two’s complement formatted PCM data at standard audio sample rates including 48,44.1 and 3

Page 15

22 DS671F2CS43854.2 Mode SelectIn Hardware Mode, operation is determined by the Mode Select pins. The states of these pins are continu-ally scanned fo

Page 16 - =20pF

DS671F2 23CS43854.3 Digital Interface Formats The serial port operates as a slave and supports the I²S, Left-Justified, Right-Justified, One-Line Mode

Page 17 - Repeated

24 DS671F2CS43854.3.1 OLM #1OLM #1 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave toSCLK at 128 Fs. Six

Page 18

DS671F2 25CS43854.3.3 OLM #3OLM #3 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave toSCLK at 256 Fs. Eig

Page 19 - 3. TYPICAL CONNECTION DIAGRAM

26 DS671F2CS43854.3.5 TDMThe TDM serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slaveto SCLK at 256 Fs. Data

Page 20 - DSD_SCLK

DS671F2 27CS43854.6 De-EmphasisThe CS4385 includes on-chip digital de-emphasis filters. The de-emphasis feature is included to accommo-date older audi

Page 21 - 4. APPLICATIONS

28 DS671F2CS43854.8 Direct Stream Digital (DSD) Mode In Software Mode, the DSD/PCM bits (Reg. 02h) are used to configure the device for DSD Mode. TheD

Page 22 - 4.2 Mode Select

DS671F2 29CS43854.9 Grounding and Power Supply ArrangementsAs with any high-resolution converter, the CS4385 requires careful attention to power suppl

Page 23 - DS671F2 23

DS671F2 3CS43856.2 Mode Control 1 (address 02h) ...

Page 24 - 4.3.2 OLM #2

30 DS671F2CS43854.11 The MUTEC OutputsThe MUTEC1 and MUTEC234 pins have an auto-polarity detect feature. The MUTEC output pins are highimpedance at th

Page 25 - 4.3.4 OLM #4

DS671F2 31CS43854.12 Recommended Power-Up Sequence4.12.1 Hardware Mode1. Hold RST low until the power supplies and configuration pins are stable, and

Page 26 - 4.5 Interpolation Filter

32 DS671F2CS43854.12.2 Software Mode1. Hold RST low until the power supply is stable, and the master and left/right clocks are locked to the appropria

Page 27 - 4.7 ATAPI Specification

DS671F2 33CS43854.14.2.1 I²C WriteTo write to the device, follow the procedure below while adhering to the control port Switching Specifica-tions in S

Page 28 - Not Used

34 DS671F2CS43854.14.3 SPI ModeIn SPI Mode, data is clocked into the serial control data line, CDIN, by the serial control port clock, CCLK(see Figure

Page 29 - 4.9.1 Capacitor Placement

DS671F2 35CS43855. REGISTER QUICK REFERENCE Addr Function 7 6 5 4 3 2 1 001h Chip Revision PART4 PART3 PART2 PART1 PART0 REV REV REVdefault 0 0 0 0 1

Page 30 - 4.11 The MUTEC Outputs

36 DS671F2CS438514h Vol. Control A4 A4_VOL7 A4_VOL6 A4_VOL5 A4_VOL4 A4_VOL3 A4_VOL2 A4_VOL1 A4_VOL0default0000000015h Vol. Control B4 B4_VOL7 B4_VOL6

Page 31 - 4.12.1 Hardware Mode

DS671F2 37CS43856. REGISTER DESCRIPTIONNote: All registers are read/write in I²C Mode and write only in SPI, unless otherwise noted.6.1 Chip Revision

Page 32 - 4.14.2 I²C Mode

38 DS671F2CS43856.2.3 PCM/DSD Selection (DSD/PCM)Default = 00 - PCM1 - DSDFunction:This function selects DSD or PCM Mode. The appropriate data and cl

Page 33 - 4.14.2.2 I²C Read

DS671F2 39CS4385 6.3.2 Functional Mode (FM)Default = 1100 - Single-Speed Mode (4 to 50 kHz sample rates)01 - Double-Speed Mode (50 to 100 kHz sample r

Page 34 - 4.14.3.1 SPI Write

4 DS671F2CS4385LIST OF FIGURESFigure 1.Serial Audio Interface Timing ...

Page 35 - 5. REGISTER QUICK REFERENCE

40 DS671F2CS43856.4.2 Direct DSD Conversion (DIR_DSD)Function:When set to 0 (default), DSD input data is sent to the DSD processor for filtering and v

Page 36 - Addr Function 7 6 5 4 3 2 1 0

DS671F2 41CS43856.5 Filter Control (address 05h)6.5.1 Interpolation Filter Select (FILT_SEL) Function:When set to 0 (default), the Interpolation Filte

Page 37 - 6. REGISTER DESCRIPTION

42 DS671F2CS43856.7.2 Channel A Volume = Channel B Volume (Px_A=B) Default = 00 - Disabled1 - EnabledFunction:The AOUTAx and AOUTBx volume levels are

Page 38 - 6.3 PCM Control (address 03h)

DS671F2 43CS4385Soft Ramp on Zero CrossingSoft Ramp and Zero Cross Enable dictates that signal-level changes, either by attenuation changes ormuting,

Page 39 - 6.4 DSD Control (address 04h)

44 DS671F2CS43856.8.5 DSD Auto-Mute (DAMUTE) Function:When set to 1 (default), the Digital-to-Analog converter output will mute following the receptio

Page 40

DS671F2 45CS43856.10 Mixing Control (address 0Ah, 0Dh, 10h, 13h)6.10.1 De-Emphasis Control (PX_DEM1:0)Default = 0000 - Disabled01 - 44.1 kHz10 - 48 kH

Page 41

46 DS671F2CS43856.11 Volume Control (address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h, 14h, 15h)These eight registers provide individual volume and mute control f

Page 42

DS671F2 47CS43856.12 PCM Clock Mode (address 16h)6.12.1 Master Clock DIVIDE by 2 ENABLE (MCLKDIV) Function:When set to 1, the MCLKDIV bit enables a ci

Page 43 - 6.8.4 PCM Auto-Mute (PAMUTE)

48 DS671F2CS43857. FILTER PLOTS0.40.50.60.70.80.91−120−100−80−60−40−200Frequency(normalized to Fs)Amplitude (dB)0.40.420.440.460.480.50.520.540.560.58

Page 44 - 6.9.1 Mute (MUTE_xx)

DS671F2 49CS4385 00.050.10.150.20.250.30.350.40.450.5−0.02−0.015−0.01−0.00500.0050.010.0150.02Frequency(normalized to Fs)Amplitude (dB)0.450.460.470

Page 45

DS671F2 5CS4385LIST OF TABLESTable 1. Single-Speed Mode Standard Frequencies ...

Page 46

50 DS671F2CS4385 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.91120100806040200Frequency(normalized to Fs)Amplitude (dB)0.2 0.3 0.4 0.5 0.6 0.7 0.8120100806040200F

Page 47 - 76543210

DS671F2 51CS4385 0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55109876543210Frequency(normalized to Fs)Amplitude (dB)0 0.05 0.1 0.15 0.2 0.250

Page 48 - 7. FILTER PLOTS

52 DS671F2CS43858. PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all other

Page 49 - DS671F2 49

DS671F2 53CS43859. PACKAGE DIMENSIONS INCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA --- 0.055 0.063 --- 1.40 1.60A1 0.002 0.004 0.006 0.05 0.10 0.15B

Page 50 - 50 DS671F2

54 DS671F2CS438510.ORDERING INFORMATION11.REFERENCES1. How to Achieve Optimum Performance from Delta-Sigma A/D & D/A Converters, by Steven Harris.

Page 51 - DS671F2 51

DS671F2 55CS4385Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one n

Page 52 - 8. PARAMETER DEFINITIONS

6 DS671F2CS43851. PIN DESCRIPTION Pin Name # Pin DescriptionVD 4Digital Power (Input) - Positive power supply for the digital section. Refer

Page 53 - 48L LQFP PACKAGE DRAWING

DS671F2 7CS4385 AOUTA1 +,-AOUTB1 +,-AOUTA2 +,-AOUTB2 +,-AOUTA3 +,-AOUTB3 +,-AOUTA4 +,-AOUTB4 +,-39, 4038, 3735, 3634, 3329, 3028, 2725, 2624,

Page 54 - 12.REVISION HISTORY

8 DS671F2CS43852. CHARACTERISTICS AND SPECIFICATIONSRECOMMENDED OPERATING CONDITIONSGND = 0 V; all voltages with respect to ground. ABSOLUTE MAXIMUM R

Page 55 - DS671F2 55

DS671F2 9CS4385DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CQZ)Test Conditions (unless otherwise specified): VA = VLS = VLC = 5 V; VD = 2.5 V; TA = 25°C

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