Cirrus-logic CS4384 Manuel d'utilisateur

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.com103 dB, 192 kHz 8-Channel D/A ConverterFeatures Advanced Multi-bit Delta

10 DS620F1CS4384POWER AND THERMAL CHARACTERISTICS Notes:4. Current consumption increases with increasing FS within a given speed mode and is signal

DS620F1 11CS4384COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSEThe filter characteristics have been normalized to the sample rate (Fs) and

12 DS620F1CS4384COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE(CONTINED)DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSEParamete

DS620F1 13CS4384DIGITAL CHARACTERISTICS13. Any pin except supplies. Transient currents of up to ±100 mA on the input pins will not cause SCR latch-upP

14 DS620F1CS4384SWITCHING CHARACTERISTICS - PCM(Inputs: Logic 0 = GND, Logic 1 = VLS, CL = 30 pF) Notes:14. After powering up, RST should be held

DS620F1 15CS4384SWITCHING CHARACTERISTICS - DSD(Logic 0 = AGND = DGND; Logic 1 = VLS; CL=30pF) Parameter Symbol Min Typ Max UnitMCLK Duty Cycle 40 -

16 DS620F1CS4384SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT(Inputs: Logic 0 = GND, Logic 1 = VLC, CL=30pF)Notes:17. Data must be held for su

DS620F1 17CS4384SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT (Inputs: Logic 0 = GND, Logic 1 = VLC, CL=30pF)Notes:18. tspi only needed before

18 DS620F1CS43843. TYPICAL CONNECTION DIAGRAM VLSMCL KVDAOUT18320.1 µF+1 µF+2.5 VSDIN191 µF0.1 µF++2021FILT+VQ76LRCKSCLKSDIN3SDIN2390.1 µF47 µFVA0

DS620F1 19CS4384 VLSC S 43 84MCLKVD8320.1 µF+1 µF+2.5 VSDIN1976LRCKSCL

2 DS620F1CS4384TABLE OF CONTENTS1. PIN DESCRIPTION...

20 DS620F1CS43844. APPLICATIONS The CS4384 serially accepts twos complement formatted PCM data at standard audio sample rates including 48,44.1 and 32

DS620F1 21CS43844.2 Mode SelectIn Hardware Mode, operation is determined by the Mode Select pins. The states of these pins are continu-ally scanned f

22 DS620F1CS43844.3 Digital Interface Formats The serial port operates as a slave and supports the I²S, Left-Justified, Right-Justified, One-Line Mode

DS620F1 23CS4384 4.3.1 OLM #1OLM #1 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave toSCLK at 128 Fs. Si

24 DS620F1CS43844.3.3 OLM #3OLM #3 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave toSCLK at 256 Fs. Eig

DS620F1 25CS43844.4 Oversampling ModesThe CS4384 operates in one of three oversampling modes based on the input sample rate. Mode selectionis determin

26 DS620F1CS43844.7 ATAPI SpecificationThe CS4384 implements the channel mixing functions of the ATAPI CD-ROM specification. TheATAPI functions are a

DS620F1 27CS4384 Figure 22. DSD Phase Modulation Mode Diagram4.9 Grounding and Power Supply ArrangementsAs with any high resolution converter, the CS

28 DS620F1CS4384 4.11 The MUTEC OutputsThe MUTEC1 and MUTEC234 pins have an auto-polarity detect feature. The MUTEC output pins are highimpedance at

DS620F1 29CS4384 Figure 25. Recommended Mute Circuitry 4.12 Recommended Power-Up Sequence4.12.1 Hardware Mode1. Hold RST low until the power supplies

DS620F1 3CS43846.2.3 PCM/DSD Selection (DSD/PCM)... 366.2.4 DAC

30 DS620F1CS4384converted incorrectly by the Hardware Mode settings).4. Set the PDN bit to 0. This will initiate the power-up sequence, which lasts ap

DS620F1 31CS43844.14.2.2 I²C ReadTo read from the device, follow the procedure below while adhering to the control port Switching Specifica-tions.1. I

32 DS620F1CS43846. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bringCS high, and follow the

DS620F1 33CS43845. REGISTER QUICK REFERENCE Addr Function 7 6 5 4 3 2 1 001h Chip Revision PART4 PART3 PART2 PART1 PART0 REV2 REV1 REV0default 0 0 0 0

34 DS620F1CS438414h Vol. Control A4 A4_VOL7 A4_VOL6 A4_VOL5 A4_VOL4 A4_VOL3 A4_VOL2 A4_VOL1 A4_VOL0default0000000015h Vol. Control B4 B4_VOL7 B4_VOL6

DS620F1 35CS43846. REGISTER DESCRIPTIONNote: All registers are read/write in I²C Mode and write only in SPI, unless otherwise noted.6.1 Chip Revision

36 DS620F1CS43846.2.3 PCM/DSD Selection (DSD/PCM)Default = 00 - PCM1 - DSDFunction:This function selects DSD or PCM Mode. The appropriate data and clo

DS620F1 37CS4384 6.3.2 Functional Mode (FM)Default = 1100 - Single-Speed Mode (4 to 50 kHz sample rates)01 - Double-Speed Mode (50 to 100 kHz sample r

38 DS620F1CS43846.4.2 Direct DSD Conversion (DIR_DSD)Function:When set to 0 (default), DSD input data is sent to the DSD processor for filtering and v

DS620F1 39CS43846.5 Filter Control (Address 05h)6.5.1 Interpolation Filter Select (FILT_SEL) Function:When set to 0 (default), the Interpolation Filte

4 DS620F1CS4384LIST OF FIGURESFigure 1. Serial Audio Interface Timing...

40 DS620F1CS4384The AOUTAx and AOUTBx volume levels are independently controlled by the A and the B Channel Vol-ume Control Bytes when this function i

DS620F1 41CS43846.8.2 Soft Volume Ramp-Up After Error (RMP_UP) Function:An un-mute will be performed after executing an LRCK/MCLK ratio change or erro

42 DS620F1CS4384Function:Auto mute polarity detect (00)See Section 4.11 on page 28 for the description.Active low mute polarity (10)When RST is low th

DS620F1 43CS43846.10.2 ATAPI Channel Mixing and Muting (ATAPI)Default = 01001 - AOUTAx=aL, AOUTBx=bR (Stereo)Function:The CS4384 implements the channe

44 DS620F1CS43846.11 Volume Control (Address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h, 14h, 15h)These eight registers provide individual volume and mute control f

DS620F1 45CS43847. FILTER RESPONSE PLOTS 0.4 0.5 0.6 0.7 0.8 0.9 1−120−100−80−60−40−200Frequency(normalized to Fs)Amplitude (dB)0.4 0.42 0.44 0.46 0.4

46 DS620F1CS4384 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−0.02−0.015−0.01−0.00500.0050.010.0150.02Frequency(normalized to Fs)Amplitude (dB)0.4

DS620F1 47CS4384 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1120100806040200Frequency(normalized to Fs)Amplitude (dB)0.2 0.3 0.4 0.5 0.6 0.7 0.8120100806040200

48 DS620F1CS4384 0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55109876543210Frequency(normalized to Fs)Amplitude (dB)0 0.05 0.1 0.15 0.2 0.250

DS620F1 49CS43848. REFERENCES1. How to Achieve Optimum Performance from Delta-Sigma A/D & D/A Converters, by Steven Harris. Paperpresented at the

DS620F1 5CS4384LIST OF TABLESTable 1. Single-Speed Mode Standard Frequencies ...

50 DS620F1CS438410.PACKAGE DIMENSIONSINCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA --- 0.055 0.063 --- 1.40 1.60A1 0.002 0.004 0.006 0.05 0.10 0.15B

DS620F1 51CS438411.ORDERING INFORMATION12.REVISION HISTORY Product Description Package Pb-Free Grade Temp Range Container Order #CS4384114 dB, 192 kHz

52 DS620F1CS4384

6 DS620F1CS43841. PIN DESCRIPTIONPin Name # Pin DescriptionVD 4Digital Power (Input) - Positive power supply for the digital section. Refer to the Rec

DS620F1 7CS4384AOUT1AOUT2AOUT3AOUT4AOUT5AOUT6AOUT7AOUT83938353429282524Analog Output (Output) - The full scale analog output level is specified in the

8 DS620F1CS43842. CHARACTERISTICS AND SPECIFICATIONSRECOMMENDED OPERATING CONDITIONS(GND = 0 V; all voltages with respect to ground.)ABSOLUTE MAXIMUM

DS620F1 9CS4384DAC ANALOG CHARACTERISTICSTest Conditions (unless otherwise indicated): VA = VLS = VLC = 5 V; VD = 2.5 V; TA = 25 °C; Full-Scale 997 Hz