Cirrus-logic CS4392 Manuel d'utilisateur

Preliminary Product InformationThis document contains information for a new product.Cirrus Logic reserves the right to modify this product without not

CS439210 DS459PP33.4 Interpolation FilterTo accommodate the increasingly complex requirements of digital audio systems, the CS4392 incorpo-rates selec

CS4392DS459PP3 113.6 Digital Interface FormatThe device will accept audio samples in several digital interface formats as illustrated in Tables 5 and

CS439212 DS459PP33.7 De-Emphasis The device includes on-chip digital de-emphasis. Figure 7 shows the de-emphasis curve for FS equal to44.1 kHz. The fr

CS4392DS459PP3 133.9 Using DSD modeIn stand-alone mode, DSD operation is selected by holding DSD_EN(LRCK) high and applying the DSDdata and clocks to

CS439214 DS459PP34. CONTROL PORT INTERFACEThe control port is used to load all the internal register settings (see section 6). The operation of the co

CS4392DS459PP3 154.0.2b I2C ReadTo read from the device, follow the procedure below while adhering to the control portSwitching Specifications.1) Init

CS439216 DS459PP34.0.3 SPI ModeIn SPI mode, data is clocked into the serial control data line, CDIN, by the serial control port clock,CCLK (see Figure

CS4392DS459PP3 175. REGISTER QUICK REFERENCEAddr Function 7 6 5 4 3 2 1 001h Mode Control 1 AMUTE DIF2 DIF1 DIF0 DEM1 DEM0 FM1 FM01000 0 0 0002h Volum

CS439218 DS459PP36. REGISTER DESCRIPTION** All registers are read/write in Two-Wire mode and write only in SPI mode, unless otherwise noted**6.1 Mode

CS4392DS459PP3 19DSD Mode - The relationship between the oversampling ratio of the DSD audio data and the required Master clock to DSD data rate is de

CS43922 DS459PP3TABLE OF CONTENTS1. PIN DESCRIPTION - PCM DATA MODE ... 51.1 PIN DE

CS439220 DS459PP36.2 Volume and Mixing Control (Address 02h)6.2.1 Channel A Volume = Channel B Volume (Bit 7)Function:The AOUTA and AOUTB volume level

CS4392DS459PP3 21ATAPI4 ATAPI3 ATAPI2 ATAPI1 ATAPI0 AOUTA AOUTB00000 MUTE MUTE00001 MUTE bR00010 MUTE bL00011 MUTE b[(L+R)/2]00100 aR MUTE00101 aR bR0

CS439222 DS459PP36.3 Channel A Volume Control - Address 03hSee 4.4 Channel B Volume Control - Address 04h6.4 CHANNEL B VOLUME CONTROL - ADDRESS 04H6.4

CS4392DS459PP3 236.5.2 Control Port Enable (Bit 5)Function:This bit defaults to 0, allowing the device to power-up in Stand-Alone mode. The Control p

CS439224 DS459PP36.6.2 Soft Volume Ramp-up after Reset (Bit 3)Function:This function allows the user to control whether a soft ramp up in volume is ap

CS4392DS459PP3 257. CHARACTERISTICS/SPECIFICATIONSANALOG CHARACTERISTICS (CS4392-KS/KZ/KZZ) ((Test conditions (unless otherwise specified): Input tes

CS439226 DS459PP3COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (The filter characteristics and the X-axis of the response plots have bee

CS4392DS459PP3 27COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (Cont.)Notes: 3. Slow Roll-Off interpolation filter is only available in

CS439228 DS459PP3 0.4 0.5 0.6 0.7 0.8 0.9 1120100806040200Frequency(normalized to Fs)Amplitude (dB)0.4 0.42 0.44 0.46 0.48 0.5 0.52 0.54 0.56 0.58

CS4392DS459PP3 29 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.50.020.0150.010.00500.0050.010.0150.02Frequency(normalized to Fs)Amplitude (dB)0.45

CS4392DS459PP3 36.2.2 Soft Ramp or Zero Cross Enable (Bits 6:5) ...206.2.3 ATAPI Channel Mixing and Muting

CS439230 DS459PP3 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1120100806040200Frequency(normalized to Fs)Amplitude (dB)0.2 0.3 0.4 0.5 0.6 0.7 0.8120100806040

CS4392DS459PP3 31 0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55109876543210Frequency(normalized to Fs)Amplitude (dB)Figure 30. Quad Spee

CS439232 DS459PP3SWITCHING CHARACTERISTICS - SERIAL AUDIO INTERFACE (Inputs: Logic 0 = 0 V, Logic 1 = VL) .Parameters Symbol Min Typ Max UnitsInput

CS4392DS459PP3 33SWITCHING SPECIFICATIONS - DSD INTERFACE (Logic 0 = AGND; Logic 1 = VL) Parameter Symbol Min Max UnitMCLK Duty Cycle 40 60 %DSD_SCLK

CS439234 DS459PP3SWITCHING CHARACTERISTICS - CONTROL PORT INTERFACE (Inputs: logic 0 = AGND, logic 1 = VL)Notes: 6. Data must be held for sufficient

CS4392DS459PP3 35SWITCHING CHARACTERISTICS - SPI CONTROL PORT (Inputs: logic 0 = AGND, logic 1 = VL)Notes: 7. tspi only needed before first falling e

CS439236 DS459PP3DC ELECTRICAL CHARACTERISTICS (AGND = 0V; all voltages with respect to AGND.) Notes: 10. Normal operation is defined as RST = HI with

CS4392DS459PP3 37RECOMMENDED OPERATING SPECIFICATIONS (AGND = 0V; all voltages with respect to AGND.)ABSOLUTE MAXIMUM RATINGS (AGND = 0 V; all voltag

CS439238 DS459PP38. PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all other

CS4392DS459PP3 3910.PACKAGE DIMENSIONS Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include m

CS43924 DS459PP3LIST OF FIGURESFigure 1. Typical Connection Diagram - PCM Mode...

CS439240 DS459PP3PACKAGE DIMENSIONS(cont.).INCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA 0.093 0.098 0.104 2.35 2.50 2.65A1 0.004 0.008 0.012 0.10 0.

CS4392DS459PP3 51. PIN DESCRIPTION - PCM DATA MODERST 1 Reset (Input) - Powers down device and resets all internal registers to their default settings

CS43926 DS459PP31.1 PIN DESCRIPTION - DSD modeDSD_ADSD_B34DSD Data (Input) - Input for Direct Stream Digital serial audio data.DSD_Mode 5 DSD Mode (In

CS4392DS459PP3 72. TYPICAL CONNECTION DIAGRAMSSCLKAudioDataProcessor*External ClockMCLKAGNDAOUTB+CS4392SDATAVAAOUTB-+5V AnalogModeSelectM1 (SDA/CDIN)M

CS43928 DS459PP3DSD_BAudioDataProcessor*External ClockMCLKAGNDAOUTB+CS4392DSD_AVAAOUTB-+5V AnalogModeSelectM1 (SDA/CDIN)M0 (AD0/CS)AOUTA-AOUTA+VLAnalo

CS4392DS459PP3 93. APPLICATIONS3.1 Recommended Power-up Sequence for Hardware Mode1) Hold RST low until the power supplies, master, and left/right clo