Cirrus-logic CDB470xx Manuel d'utilisateur télécharger pdf (Page 23)

Audio Clocking

CDB47xxx User’s Manual

1.5.3 Clock and Data Flow for DAI Input with Fixed Output Fs

Figure 1-10. DAI Clocking with Variable Input Fs and Fixed Output Fs

The DAI clocking architecture is used when any serial audio data source is connected to the DAI header.

Figure 1-10 illustrates this clocking configuration. Note that the incoming DAI data is passed out of the

CS470xx at the Fs of the crystal connected to the ASOC.

Like the S/PDIF clocking configuration, this allows the DAI to be rate matched to another MCLK in the

system through an SRC. This means that the DAO can be run at a constant Fs that is independent of the

incoming DAI Fs. This is useful in systems with a digital amplifier that requires a fixed Fs.

The CS470xx can masters its output clocks, or slave to clocks from another source.

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Cirrus-logic CDB470xx Manuel d'utilisateur Page 23