Cirrus-logic CDB4955A Manuel d'utilisateur
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Noté. / 5. Basé sur avis des utilisateurs
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1
Copyright Cirrus Logic, Inc. 2001
(All Rights Reserved)
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
CDB4954A/55A
Evaluation Board for CS4954/55
Features
l Demonstrates recommended layout and
grounding practices
l Supports both parallel and serial digital
video input
l On-board test pattern generation
l Supports NTSC/PAL video formats
l 3.3 V or 5 V operation
l Composite, S-Video, and RGB outputs
l Supports Standalone mode via onboard
DIP switch
l RS232 interface with PC
l Single 6-9 V external DC power supply
l Additional op-amps with open pads for
prototyping additional filters
Description
The CDB4954A/55A board allows fast evaluation of the
features of the CS4954 digital video encoders. The
board may also be configured to accept external TTL
level timing and data signals for use during system
development.
Also, to simplify the demonstration of the features of the
CS4954, the CDB4954A/55A is equipped with an on-
board microcontroller and pre-programmed FLASH
memory to facilitate configuration and evaluation of
the
CS4954 digital video encoder.
ORDERING INFORMATION
CDB4954A Evaluation Board
CDB4955A Evaluation Board
I
Regulator
Motorola 908
Microcontroller
+3.3V
+5V
Reset
FPGA
A/D7:0
CS4954
SDRAM
SCL
SDA_O
DB25
Reset
Switch
Data
CTL
656
DATA
/8
HS,VS,
FIELD
TTX
/2
OSC
54MHZ
4K
1%
ADDR
RD-
WR-
DAT<7..0>
RST-
TTXD,
TTXRQ
ALE
OUT
FILT
OUT
FILT
OUT
FILT
OUT
FILT
OUT
FILT
OUT
FILT
u
Addr
RX
TX
ECL
RECEIVER
656_IN
D
B
9
RS-232
Interface
TXD
RXD
R
G
B
Y
C
CVBS
27MHz
PLD
EEPROM
ISP
WR-
RD-
TEST
SCL
SDA
POWER
INLET
6.5 - 10VDC
1
2
3
4
5
6
7
8
OPEN
Hdr -
16PIN
SDL
SDA
Regulator
3.3V
or
+5V
BNC
SMPTE-259M
Interface
656
Flash
245
BUFFER
RESET-
Hdr -
16PIN
RESET
RESET-
Data
CTL
Addr
RESET-
RCA
CONNECTORS
DIN4
CONN.
RCA
CONNECTOR
PROG
MPU
PROGRAM
HEADER
RESET-
PROGRAMMING
ENABLE
JUMPER
SELECTABLE
HI/LOW
IMPEDANCE
FILTERS
CCIR 656 SERIAL/ PARALELL
INPUTS
PC SERIAL
INTERFACE
MAY ‘01
DS278DB2
Résumé du contenu
Page 1 - CDB4954A/55A
Preliminary Product InformationThis document contains information for a new product.Cirrus Logic reserves the right to modify this product without not
Page 2
CDB4954A/55A10Figure 6. FPGA
Page 3
CDB4954A/55A11Figure 7. CS4954/5
Page 4
CDB4954A/55A12Figure 8. Microprocessor
Page 5
CDB4954A/55A13Figure 9. Video Output Filters
Page 6
CDB4954A/55A14Figure 10. Power/RS232 Interface
Page 7
CDB4954A/55A15Figure 11. Silkscreen Top
Page 8
CDB4954A/55A16Figure 12. Top Side
Page 9
CDB4954A/55A17Figure 13. Power Layer
Page 10
CDB4954A/55A18Figure 14. Ground Layer
Page 11
CDB4954A/55A19Figure 15. Bottom Side
Page 12
CDB4954A/55A2TABLE OF CONTENTS1. CDB4954A/55A SYSTEM OVERVIEW ... 4
Page 14
CDB4954A/55A3LIST OF TABLESTable 1. System Connections...
Page 15
CDB4954A/55A41. CDB4954A/55A SYSTEM OVERVIEWThe CDB4954A/55A Evaluation Board allows theCS4954/55 NTSC/PAL Digital Video Encoder ICsfrom Cirrus Logic
Page 16
CDB4954A/55A5shown in Figure 2. You can directly enter the hexvalue for all bits in the register and click the OKbutton. This will set all bits at onc
Page 17
CDB4954A/55A62.2.2.2 Video Input Source OptionThis option selects the video source which willserve as input for the CS4954/55. Internal Videomeans all
Page 18
CDB4954A/55A7..ENCODER22 pF1.8 µH300Ω300 Ω330pF 270pFFigure 3. 300 Ω FiltersDRIVERENCODER22 pF2.2 µH75 Ω330 pF 270 pFFigure 4. 75 Ω FiltersTO 75 Ω L
Page 19
CDB4954A/55A8J34 GND Jumper for Dig Video InputJumperedOpenGnd ConnectedNo Gnd ConnectJ3J13J15J17J20J21J22J23J24J25J27J29J31High/Low Impedance SelectN
Page 20
CDB4954A/55A9 Figure 5. Digital Video Input
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