Cirrus-logic CS4353 Manuel d'utilisateur télécharger pdf (Page 20)

20 DS803F3

CS4353

2. Remove the MCLK signal without applying any glitched pulses to the MCLK pin.

3. Remove the power supply voltages.

Note: A glitched pulse is any pulse that is shorter than the period defined by the minimum/maximum

MCLK signal duty cycle specification and the nominal frequency of the input MCLK signal. A tran-

sient may occur on the analog outputs if the MCLK signal duty cycle specification is violated

when the MCLK signal is removed during normal operation; see “Switching Specifications - Serial

Audio Interface” on page 9.

4.10 Grounding and Power Supply Arrangements

As with any high-resolution converter, the CS4353 requires careful attention to power supply and grounding

arrangements if its potential performance is to be realized. Figure 3 shows the recommended power ar-

rangements, with VCP, VA, and VL connected to clean supplies. It is strongly recommended that a single

ground plane be used, with the DGND, CPGND, and AGND pins all connected to this common plane.

Should it be necessary to split the ground planes, the DGND and CPGND pins should be connected to the

digital ground plane and the AGND pin should be connected to the analog ground plane. In this configura-

tion, it is critical that the digital and analog ground planes be tied together with a low-impedance connection,

ideally a strip of copper on the printed circuit board, at a single point near the CS4353.

All signals, especially clocks, should be kept away from the VBIAS pin in order to avoid unwanted coupling

into the DAC.

4.10.1 Capacitor Placement

Decoupling capacitors should be placed as close to the device as possible, with the low-value ceramic

capacitor being the closest. To further minimize impedance, these capacitors should be located on the

same PCB layer as the device. If desired, all supply pins may be connected to the same supply, but a

decoupling capacitor should still be placed on each supply pin. See DC Electrical Characteristics for the

voltage present across pin pairs. This is useful for choosing appropriate capacitor voltage ratings and ori-

entation if electrolytic capacitors are used.

The CDB4353 evaluation board demonstrates the optimum layout and power supply arrangements.

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Cirrus-logic CS4353 Manuel d'utilisateur Page 20