1Copyright Cirrus Logic, Inc. 2003(All Rights Reserved)Cirrus Logic, Inc.http://www.cirrus.comCDB42428Evaluation Board For CS424xxFeaturesSingle-End
CDB42428102. INITIAL BOARD SETUP2.1 Power Supplies:1) Verify that all power supplies are off before making connections.2) Connect a +5.0 VDC power sup
CDB42428113. CDB425XX.EXE USER'S GUIDE3.1 Main WindowThe main window of the CDB42428 control application allows the user to configure the CDB4242
CDB4242812• Analog signal source and analyzer• Digital signal source and analyzer• Windows® compatible computer with parallel port cable and CDB425xx
CDB42428133.7 Quick Start Preset - One-Line Mode (OLM)To measure one-line mode analog in to analog out performance, you will need the following:• CS42
CDB42428144. MUTING SCHEME Figure 2. Output Channel Mute Select GPO6EN_MUTE6MUTEC GPO7EN_MUTE7MUTECMUTECEXT_MUTE+VMUTE CH 2MUTE CH 1MUTE
CDB42428155. SCHEMATICS AND LAYOUT Figure 3. CS424xx
CDB4242816 Figure 4. Clocks, Data, and DSP Header
CDB4242817 Figure 5. SPDIF
CDB4242818 Figure 6. CS5361 External ADC #1
CDB4242819 Figure 7. CS5361 External ADC #2
CDB424282TABLE OF CONTENTS1. SYSTEM OVERVIEW ...
CDB4242820 Figure 8. CS424xx Analog Inputs
CDB4242821 Figure 9. Analog Outputs A1 and B1
CDB4242822 Figure 10. Analog Outputs A2 and B2
CDB4242823 Figure 11. Analog Outputs A3 and B3
CDB4242824 Figure 12. Analog Outputs A4 and B4
CDB4242825 Figure 13. DB-25, Ext Ctrl Header, Reset
CDB4242826 Figure 14. CPLD
CDB4242827 Figure 15. Power
CDB4242828 Figure 16. CS8416
CDB4242829 Figure 17. Component Placement and Reference Designators
CDB424283Figure 18. Top Layer... 30F
CDB4242830 Figure 18. Top Layer
CDB4242831 Figure 19. Bottom Layer
CDB42428326. ADDENDUMThe following silkscreen markings on the evaluation board are mislabeled and should be labeled as specified (allschematic labels
CDB4242841. SYSTEM OVERVIEW The CDB42428 demonstration board is an excellent means for evaluating the CS42428/26/18/16 family of highlyintegrated CODE
CDB424285The 2-pole low pass filter provides an example of an inexpensive circuit with good distortion and dynamic range per-formance. It is designed
CDB4242861.8 CPLDThe CPLD controls the on-board signal routing and configuration (see Figure 14). The CPLD interfaces with thecomputer software throug
CDB4242871.15 External Control Header SignalsOPT4 Input CS8416 digital audio interface input via opticalSPDIF TX - J2 Output CS8406 digital audio inte
CDB42428810 Ground CDB GND - -11 Master MUTE to all Outputs CTRL EXT_MUTE 74VHC125 VLC12 Ground CDB GND - -13 Master RESET CTRL EXT_RESET Diode -14 Gr
CDB4242891.16 DSP Header SignalsHeaderPin #Signal Description Source SchematicSignal NameBuffer BufferVoltage1 Master ClockCS424xx or DSPDSP_MCLK 74VH
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