Cirrus-logic CS5528 Manuel d'utilisateur

Copyright  Cirrus Logic, Inc. 2009(All Rights Reserved)http://www.cirrus.com CS5521/22/23/24/2816-bit or 24-bit, 2/4/8-channel ADCs with PGIAFeatures

CS5521/22/23/24/2810 DS317F8DYNAMIC CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS (AGND, DGND = 0 V; See Note 20.)Notes: 20. All voltages with resp

CS5521/22/23/24/28DS317F8 11SWITCHING CHARACTERISTICS (TA = 25° C; VA+ = 5 V ±5%; VD+ = 3.0 V ±10% or 5 V ±5%; Levels: Logic 0 = 0 V, Logic 1 = VD+; C

CS5521/22/23/24/2812 DS317F8CSSCLKt0t2t1t3t6Figure 1. Continuous Running SCLK Timing (Not to Scale)CSSCLKMSBMSB-1 LSBSDIt3t4t5t1t2t6Figure 2. SDI Wr

CS5521/22/23/24/28DS317F8 131. GENERAL DESCRIPTION The CS5521/22/23/24/28 are highly integrated ΔΣAnalog-to-Digital Converters (ADCs) which usecharg

CS5521/22/23/24/2814 DS317F81.1.1 Instrumentation AmplifierThe instrumentation amplifier is chopper stabilizedand is activated any time conversions a

CS5521/22/23/24/28DS317F8 151.1.3 Analog Input Span ConsiderationsThe CS5521/22/23/24/28 is designed to measurefull-scale ranges of 25 mV, 55 mV, 100

CS5521/22/23/24/2816 DS317F8mentation amplifier with a gain range setting of100 mV or less, is typically 100 pA. This is lowenough to permit large ext

CS5521/22/23/24/28DS317F8 17mentation amplifier, and providing a number offlags which indicate converter operation.A group of registers, called Channe

CS5521/22/23/24/2818 DS317F81.2.1 System InitializationAfter power is first applied to theCS5521/22/2324/28 devices, the user should waitfor the osci

CS5521/22/23/24/28DS317F8 191.2.2 Command Register Quick Reference D7(MSB)D6D5D4D3D2D1D0CB CS2 CS1 CS0 R/WRSB2 RSB1 RSB0BIT NAME VALUE FUNCTIOND7 Co

CS5521/22/23/24/282 DS317F8TABLE OF CONTENTS ANALOG CHARACTERISTICS...

CS5521/22/23/24/2820 DS317F81.2.3 Command Register DescriptionsREAD/WRITE INDIVIDUAL OFFSET CALIBRATION REGISTERFunction: These commands are used to

CS5521/22/23/24/28DS317F8 21READ/WRITE CONFIGURATION REGISTERFunction: These commands are used to read from or write to the configuration register.R/W

CS5521/22/23/24/2822 DS317F8PERFORM CONVERSIONFunction: These commands instruct the ADC to perform conversions on the physical input channel point-ed

CS5521/22/23/24/28DS317F8 23PERFORM CALIBRATIONFunction: These commands instruct the ADC to perform a calibration on the physical input channel refer-

CS5521/22/23/24/2824 DS317F8SYNC1Function: Part of the serial port re-initialization sequence.SYNC0Function: End of the serial port re-initialization

CS5521/22/23/24/28DS317F8 251.2.4 Serial Port InterfaceThe CS5521/22/23/24/28’s serial interface consistsof four control lines: CS, SCLK, SDI, SDO.Fi

CS5521/22/23/24/2826 DS317F81.2.5 Reading/Writing the Offset, Gain, and Configuration RegistersThe CS5521/22/23/24/28’s offset, gain, and config-urat

CS5521/22/23/24/28DS317F8 27* R indicates the bit value after the part is resetCSR (Channel-Setup Register) CSR CSR#1 Setup 1Bits <47:36>Setup 2

CS5521/22/23/24/2828 DS317F81.2.6.1 Latch OutputsThe A1-A0 pins mimic the latch output, D23/D11-D22/D10, bits of the channel-setup registers. A1-A0ca

CS5521/22/23/24/28DS317F8 29sume 9.0 mW. The CS5521/23 typically consume6.0 mW. The low-power mode is an alternate modein the CS5522/24/28 that reduce

CS5521/22/23/24/28DS317F8 31.4.3 Example of Using the CSRs to Perform Conversions and Calibrations ... 381.5 Conversion Output Coding ...

CS5521/22/23/24/2830 DS317F8 D23(MSB) D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12NU NU CFS1 CFS0 NU MC LP RC DP3 DP2 DP1 DP0D11 D10 D9 D8 D7 D6 D5

CS5521/22/23/24/28DS317F8 311.3 Calibration The CS5521/22/23/24/28 offer four different cali-bration functions including self calibration and sys-tem

CS5521/22/23/24/2832 DS317F8offset to occur in the 25 mV, 55 mV, and 100 mVranges, the AIN- pin must be at the proper com-mon-mode voltage as specifie

CS5521/22/23/24/28DS317F8 33perform a system gain calibration. In either case,the calibration signals must be within the specifiedcalibration limits f

CS5521/22/23/24/2834 DS317F8The variables are defined below. V0 = First calibration voltageV1 = Second calibration voltage (greater than V0)Ru = Resu

CS5521/22/23/24/28DS317F8 35conversion words deep. Further note that the typeof conversion(s) performed and the way to accessthe resulting data from t

CS5521/22/23/24/2836 DS317F8SDO line. If, during the first 8 SCLKs,"00000000" is provided on SDI, the converter willremain in this conversi

CS5521/22/23/24/28DS317F8 371.4.1.5 Repeated Multiple-Setup Conversionswithout Wait(LP = 1 MC = 1 RC = 0)In this conversion mode, the ADC will repeat

CS5521/22/23/24/2838 DS317F8SCLKs for each Setup referenced are required toread the conversion words from the data FIFO. Thefirst 8 SCLKs are used to

CS5521/22/23/24/28DS317F8 39SD0. After ‘1111 1111’ is provided, 24 additionalSCLKs are required to transfer the last 3 bytes ofconversion data before

CS5521/22/23/24/284 DS317F8LIST OF FIGURESFigure 1. Continuous Running SCLK Timing (Not to Scale) ...

CS5521/22/23/24/2840 DS317F8of the configuration register. 4) Once the CSRs are programmed, repeated conver-sions on up to 16 Setups can be performed

CS5521/22/23/24/28DS317F8 411.5.1 Conversion Data FIFO DescriptionsCS5521/23 (EACH 16-BIT CONVERSIONS)CS5522/24/28 (EACH 24-BIT CONVERSION LEVELS) Co

CS5521/22/23/24/2842 DS317F81.6 Digital FilterThe CS5521/22/23/24/28 have eight different lin-ear phase digital filters which set the output wordrat

CS5521/22/23/24/28DS317F8 431.8 Power Supply ArrangementsThe CS5521/22/23/24/28 A/D converters are de-signed to operate from a single +5 V analog sup

CS5521/22/23/24/2844 DS317F8XOUTVD+VA+VREF+VREF-DGNDNBVAIN1+AIN1-SCLKSDOSDICS5522XINCPDCS10 Ω+5VAnalogSupply0.1 μF0.1 μF2019341AGND2141110151289135Opt

CS5521/22/23/24/28DS317F8 451.8.1 Charge Pump Drive CircuitsThe CPD (Charge Pump Drive) pin of the convertercan be used with external components (sho

CS5521/22/23/24/2846 DS317F8verter stays constant but the number of codes af-fected is doubled because the code size has beenreduced by half.The conve

CS5521/22/23/24/28DS317F8 47be initialized to these conditions when the instru-ment is used in normal operation. Once calibrationis ready, input the c

CS5521/22/23/24/2848 DS317F81.11 PCB LayoutThe CS5521/22/23/24/28 should be placed entirelyover an analog ground plane with both the AGNDand DGND pin

CS5521/22/23/24/28DS317F8 492. PIN DESCRIPTIONS 1234567813141516171819209111210CS5521CS5522VREF+ Voltage Reference InputAGNDAnalog GroundVREF- Vol

CS5521/22/23/24/28DS317F8 5CHARACTERISTICS AND SPECIFICATIONSANALOG CHARACTERISTICS (TA = 25° C; VA+, VD+ = 5 V ±5%; VREF+ = 2.5 V, VREF- = AGND, NBV

CS5521/22/23/24/2850 DS317F82.1 Clock GeneratorXIN; XOUT - Crystal In; Crystal Out.A gate inside the chip is connected to these pins and can be used

CS5521/22/23/24/28DS317F8 51NBV - Negative Bias Voltage.Input pin to supply the negative supply voltage for the 20X gain instrumentation amplifier and

CS5521/22/23/24/2852 DS317F83. SPECIFICATION DEFINITIONSLinearity ErrorThe deviation of a code from a straight line which connects the two endpoints

CS5521/22/23/24/28DS317F8 534. ORDERING INFORMATION5. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as

CS5521/22/23/24/2854 DS317F86. PACKAGE DIMENSION DRAWINGSNotes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions,

CS5521/22/23/24/28DS317F8 55Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold mismatch a

CS5521/22/23/24/2856 DS317F87. REVISION HISTORY Revision Date ChangesF8 JUL 2009 Leaded (Pb) and PDIP-packaged devices removed from ordering informat

CS5521/22/23/24/286 DS317F8ANALOG CHARACTERISTICS (Continued)Notes: 7. For the CS5528, the 25 mV, 55 mV and 100 mV ranges cannot be used unless NBV is

CS5521/22/23/24/28DS317F8 7TYPICAL RMS NOISE, CS5521/23 (Notes 10 and 11)Notes: 10. Wideband noise aliased into the baseband. Referred to the input. T

CS5521/22/23/24/288 DS317F8TYPICAL RMS NOISE, CS5522/24/28 (Notes 14 and 15)Notes: 14. Wideband noise aliased into the baseband. Referred to the input

CS5521/22/23/24/28DS317F8 95 V DIGITAL CHARACTERISTICS (TA = 25° C; VA+, VD+ = 5 V ±5%; GND = 0;See Notes 2 and 18.))Notes: 18. All measurements perfo