Cirrus-logic CS5534-BS Manuel d'utilisateur

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.comCS5532/34-BS24-bit ∆Σ ADCs with Ultra-low-noise PGIAFeaturesChopper-stab

CS5532/34-BS10 DS755F3SWITCHING CHARACTERISTICS (VA+ = 2.5 V or 5 V ±5%; VA- = -2.5V±5% or 0 V; VD+ = 3.0 V ±10% or 5 V ±5%;DGND = 0 V; Levels: Logic

CS5532/34-BSDS755F3 11CSSCLKMSBMSB-1LSBSDIt3t6t4 t5 t1t2Figure 1. SDI Write Timing (Not to Scale)CSSCLKMSB MSB-1LSBSDOt7t9t8t1t2Figure 2. SDO Read T

CS5532/34-BS12 DS755F32. GENERAL DESCRIPTIONThe CS5532/34 are highly integrated ∆Σ Analog-to-Digital Converters (ADCs) which use charge-balance techn

CS5532/34-BSDS755F3 13instrumentation amplifier is typically 1200 pAover -40°C to +85°C (MCLK=4.9152 MHz).The common-mode plus signal range of th

CS5532/34-BS14 DS755F32.1.4. No Offset DACAn offset DAC was not included in the CS553Xfamily because the high dynamic range of the con-verter elimina

CS5532/34-BSDS755F3 15conversions or calibrations with the converter inthe mode defined by one of these Setups.Using the single conversion mode, an 8-

CS5532/34-BS16 DS755F3writing a word (with RS=0) into the configuration register after performing a reset. The change in the reset sequence to includ

CS5532/34-BSDS755F3 172.2.2. Command Register Quick Reference D7(MSB) D6 D5 D4 D3 D2 D1 D00 ARA CS1 CS0 R/WRSB2 RSB1 RSB0BIT NAME VALUE FUNCTIOND7 Co

CS5532/34-BS18 DS755F32.2.3. Command Register DescriptionsREAD/WRITE ALL OFFSET CALIBRATION REGISTERSFunction: These commands are used to access the

CS5532/34-BSDS755F3 19READ/WRITE INDIVIDUAL GAIN REGISTERFunction: These commands are used to access each gain register separately. CS1 - CS0 decode t

CS5532/34-BS2 DS755F3TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ...4ANALOG CHARACT

CS5532/34-BS20 DS755F3PERFORM CONVERSIONFunction: These commands instruct the ADC to perform either a single, fully-settled conversion or con-tinuous

CS5532/34-BSDS755F3 21PERFORM CALIBRATIONFunction: These commands instruct the ADC to perform a calibration on the physical input channel se-lected by

CS5532/34-BS22 DS755F32.2.4. Serial Port InterfaceThe CS5532/34’s serial interface consists of fourcontrol lines: CS, SDI, SDO, SCLK. Figure 7 de-tai

CS5532/34-BSDS755F3 232.2.5. Reading/Writing On-Chip RegistersThe CS5532/34’s offset, gain, configuration, andchannel-setup registers are readable an

CS5532/34-BS24 DS755F3ter is read. The on-chip registers are initialized tothe following default states:After reset, the RS bit should be written back

CS5532/34-BSDS755F3 25from VA+ and VA-. Their output voltage will belimited to the VA+ voltage for a logic 1 and VA-for a logic 0.2.3.7. Offset and G

CS5532/34-BS26 DS755F32.3.9. Configuration Register Descriptions PSS (Power Save Select)[31]0 Standby Mode (Oscillator active, allows quick power-up)

CS5532/34-BSDS755F3 27Filter Rate Select, FRS[19]0 Use the default output word rates.1 Scale all output word rates and their corresponding filter char

CS5532/34-BS28 DS755F32.4.1. Channel-Setup Register Descriptions CS1-CS0 (Channel Select Bits) [31:30] [15:14]00 Select physical channel 1 01 Select

CS5532/34-BSDS755F3 29U/B (Unipolar / Bipolar) [22] [6]0 Select Bipolar mode.1 Select Unipolar mode.OL1-OL0 (Output Latch Bits) [21:20] [5:4]The latch

CS5532/34-BSDS755F3 3LIST OF FIGURESFigure 1. SDI Write Timing (Not to Scale)...

CS5532/34-BS30 DS755F32.5. CalibrationCalibration is used to set the zero and gain slope ofthe ADC’s transfer function. The CS5532/34 offerboth self

CS5532/34-BSDS755F3 312.5.4. Performing CalibrationsTo perform a calibration, the user must send a com-mand byte with its MSB=1, its pointer bits(CSR

CS5532/34-BS32 DS755F32.5.6. System CalibrationFor the system calibration functions, the user mustsupply the converter’s calibration signals which re

CS5532/34-BSDS755F3 33crocontroller and the ADC, and may prematurelyhalt the calibration cycle.For maximum accuracy, calibrations should be per-formed

CS5532/34-BS34 DS755F3rial port returns to the command mode, where itwaits for a new command to be issued. The singleconversion mode will take longer

CS5532/34-BSDS755F3 352.6.3. Examples of Using CSRs to Perform Conversions and CalibrationsAny time a calibration or conversion command isissued (C,

CS5532/34-BS36 DS755F3offset calibration on physical channel 2 and SDOfalls to indicate that the calibration is complete. Toperform additional calibra

CS5532/34-BSDS755F3 37 2.8.1. Conversion Data Output Descriptions Conversion Data Bits [31:8]These bits depict the latest output conversion.NU (Not

CS5532/34-BS38 DS755F32.9. Digital FilterThe CS5532/34 have linear phase digital filterswhich are programmed to achieve a range of outputword rates (

CS5532/34-BSDS755F3 392.10. Clock GeneratorThe CS5532/34 include an on-chip inverting am-plifier which can be connected with an externalcrystal to pr

CS5532/34-BS4 DS755F31. CHARACTERISTICS AND SPECIFICATIONSANALOG CHARACTERISTICS (VA+, VD+ = 5 V ±5%; VREF+ = 5 V; VA-, VREF-, DGND = 0 V; MCLK = 4.

CS5532/34-BS40 DS755F3tation amplifier used on these gain ranges achieveslower noise. OSC2VD+VA+VREF+VREF-DGNDVA -AIN1+SDISCLKSDOCS55

CS5532/34-BSDS755F3 41OSC2VD+VA+VREF+VREF-DGNDVA -AIN1+SDISCLKSDOCS5532OSC1CS+2.5 VAnalogSupply0.1 µF0.1 µF+-17312AIN1-51591013111214166OptionalClockS

CS5532/34-BS42 DS755F3OSC2VD+VA+VREF+VREF-DGNDVA -AIN1+SDISCLKSDOCS5532OSC1CS10Ω+3 VAnalogSupply0.1 µF0.1 µF17312AIN1-51591013111214166OptionalClockSo

CS5532/34-BSDS755F3 432.12. Getting StartedThis A/D converter has several features. From asoftware programmer’s prospective, what shouldbe done first

CS5532/34-BS44 DS755F33. PIN DESCRIPTIONS Clock GeneratorOSC1; OSC2 - Master Clock.An inverting amplifier inside the chip is connected between these

CS5532/34-BSDS755F3 45SDI - Serial Data Input.SDI is the input pin of the serial input port. Data will be input at a rate determined by SCLK. SDO - Se

CS5532/34-BS46 DS755F34. SPECIFICATION DEFINITIONSLinearity ErrorThe deviation of a code from a straight line which connects the two endpoints of the

CS5532/34-BSDS755F3 475. ORDERING INFORMATION6. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as specif

CS5532/34-BS48 DS755F37. PACKAGE DRAWINGSNotes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include m

CS5532/34-BSDS755F3 49Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold mismatch and are

CS5532/34-BSDS755F3 5ANALOG CHARACTERISTICS (Continued) (See Notes 1 and 2.) Notes: 5. The voltage on the analog inputs is amplified by the PGIA, and

CS5532/34-BS50 DS755F3RevisionsREVISION DATE CHANGESF1 Nov 2006 Initial Release.F2 MAY 2007 Corrected title to include 24-bit devices only.F3 OCT 2008

CS5532/34-BS6 DS755F3ANALOG CHARACTERISTICS (Continued) (See Notes 1 and 2.)8. All outputs unloaded. All input CMOS levels.9. Power is specified when

CS5532/34-BSDS755F3 7TYPICAL RMS NOISE (nV) (See notes 11, 12, 13 and 14)Notes: 11. The -B devices provide the best noise specifications.12. Wideband

CS5532/34-BS8 DS755F35 V DIGITAL CHARACTERISTICS (VA+, VD+ = 5 V ±5%; VA-, DGND = 0 V; See Notes 2 and 17.)3 V DIGITAL CHARACTERISTICS (TA = 25 °C; VA

CS5532/34-BSDS755F3 9DYNAMIC CHARACTERISTICS 18. The ADCs use a Sinc5 filter for the 3200 Sps and 3840 Sps output word rate (OWR) and a Sinc5 filter f