Cirrus-logic AN150 Manuel d'utilisateur

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1
Copyright Cirrus Logic, Inc. 2001
(All Rights Reserved)
Cirrus Logic, Inc.
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
AN150
Application Note
CS5531/32/33/34 FREQUENTLY ASKED QUESTIONS
INTRODUCTION
The CS5531/32/33/34 are 16 and 24-bit ADCs that
include an ultra low-noise amplifier, a 2 or 4-chan-
nel multiplexer, and various conversion and cali-
bration options. This application note is intended to
provide a resource to help users understand how to
best use the features of these ADCs. The “Getting
Started” section outlines the order in which certain
things should be done in software to ensure that the
converter functions correctly. The “Questions and
Answers” section discusses many of the common
questions that arise when using these ADCs for the
first time.
GETTING STARTED
Initialize the ADCs Serial Port
The CS5531/32/33/34 do not have a reset pin. A re-
set is performed in software by re-synchronizing
the serial port and doing a software reset. Re-syn-
chronizing the serial port ensures that the device is
expecting a valid command. It does not initiate a
reset of the ADC, and all of the register settings of
the device are retained.
A serial port re-synchronization is performed by
sending 15 (or more) bytes of 0xFF (hexadecimal)
to the converter, followed by a single byte of 0xFE.
Note that anytime a command or any other infor-
mation is to be sent to or read from the ADC’s se-
rial port, the CS pin must be low.
Perform a Software Reset
After re-synchronizing the ADCs serial port, a soft-
ware reset should be performed on the device. A re-
set will set all of the internal registers to their
default values, as detailed in the datasheet.
A software reset is performed by writing a “1” to
the RS bit (Bit 29) in the Configuration Register.
When a reset is complete, the RV bit (Bit 28) in the
Configuration Register will be set to a “1” by the
ADC. Any other bits in the Configuration Register
that need to be changed must be done with a sepa-
rate write to the register after the software reset is
performed.
Set Up the Configuration Register
After a software reset has been performed, the Con-
figuration Register can be written to configure the
general operation parameters of the device. This
step can be omitted if the system is using the de-
fault register value. Particular attention must be
paid to the setting of the VRS bit (Bit 25). The VRS
bit should be set to “1” if the voltage on the VREF+
and VREF- pins is 2.5 V or less. If the voltage on
the VREF+ and VREF- pins is greater than 2.5V,
the VRS bit should be set to “0”.
Set up the Channel Setup Registers
The Channel Setup Registers determine how the
part should operate when given a conversion or cal-
ibration command. If the system is using the device
with its default settings, the Channel Setup Regis-
ters need not be written. Whether the Channel Set-
up Registers are written or not, they should be
configured for the desired operation of the device
before performing any calibrations or conversions.
Calibrate the ADC
The CS5531/32/33/34 can be calibrated using the
on-chip calibration features for more accuracy. The
parts do not need to be calibrated to function, and
in some systems a calibration step may not be nec-
SEP ‘01
AN150REV2
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Résumé du contenu

Page 1 - Application Note

1Copyright  Cirrus Logic, Inc. 2001(All Rights Reserved)Cirrus Logic, Inc.Crystal Semiconductor Products DivisionP.O. Box 17847, Austin, Texas 78760(

Page 2 - Equation 2. LSB Size

AN15010 AN150REV2to 1.0 and performing a system offset calibration,or adjusting the offset register until the scale readszero. Following this, the gai

Page 3 - AN150REV2 3

AN150AN150REV2 11Why is the “Common mode + signal on AIN+ or AIN-” specification different for the 1X gain range?This difference is due to the fact th

Page 4 - 4 AN150REV2

AN15012 AN150REV2an output latch pin. When the GB bit is set to ‘1’,the instrumentation amplifier’s common-modevoltage is output on the A0 pin.The amp

Page 7 - AN150REV2 7

AN1502 AN150REV2essary. Any offset or gain errors in the ADC itselfand the front-end analog circuitry will remain if thedevice is left uncalibrated.If

Page 8 - 8 AN150REV2

AN150AN150REV2 3number of bits in the output word (16 for theCS5531/33 and 24 for CS5532/34).Example: Using the CS5532 in the 64X unipolarrange with a

Page 9 - AN150REV2 9

AN1504 AN150REV2of one LSB. For a 5 mV input signal when the LSBsize is 4 nV, the expected output code (decimal)from the converter would be 1,250,000.

Page 10 - Setup Registers used?

AN150AN150REV2 5CS5531/32/33/34 datasheet lists the typical RMSnoise values for all combinations of gain range andword rate.In the 32X and 64X gain ra

Page 11 - AN150REV2 11

AN1506 AN150REV2VA+ and VA- supply pins.What factors affect the input current on the voltage reference inputs?The input structure on the VREF pins is

Page 12 - 12 AN150REV2

AN150AN150REV2 7(FRS) bit in the configuration register?The FRS bit (bit 19 in the Configuration Register)is used to select between two different sets

Page 13 - • Notes •

AN1508 AN150REV2What is the difference between a “self” cali-bration and a “system” calibration?A self calibration uses voltages that are available to

Page 14

AN150AN150REV2 9noise-free resolution (for the -BS versions of theparts) over this input range, even in the presence oflarge offset voltages.What is “

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