http://www.cirrus.comCopyright Cirrus Logic, Inc. 2003(All Rights Reserved)EP73xx User’s GuideJan ‘04DS508UM4
EP7309/11/12 User’s Manual - DS508UM4 ixCopyright Cirrus Logic, Inc. 2003 List of FiguresFigure 1-1. EP73xx Block Diagram ...
9-10 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003LCD Interface9This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 10-1Copyright Cirrus Logic, Inc. 2003101010Chapter 1010Keyboard InterfaceIntroductionThekeyboardinterface provid
10-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Keyboard Interface10Operational OverviewThe keyboard interface is made up o
EP7309/11/12 User’s Manual - DS508UM4 10-3Copyright Cirrus Logic, Inc. 2003Keyboard Interface101010the default state.• KBD6 is set: Lowest 6 bits of P
10-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Keyboard Interface10This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 11-1Copyright Cirrus Logic, Inc. 2003111111Chapter 1111General Purpose I/O (GPIO)IntroductionGPIOs are user cont
11-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003General Purpose I/O (GPIO)11Programming Example;***************************
EP7309/11/12 User’s Manual - DS508UM4 12-1Copyright Cirrus Logic, Inc. 2003121212Chapter 1212PWM InterfaceIntroductionThere are two PWM (Pulse Width M
12-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003PWM Interface12PWM (Pulse Width Modulator) Register ListProgramming Example
EP7309/11/12 User’s Manual - DS508UM4 12-3Copyright Cirrus Logic, Inc. 2003PWM Interface121212PWM Register DescriptionsPump Control Register (PMPCON)A
x EP7309/11/12 User’s Manual - DS508UM4Copyright 2001, 2002 Cirrus LogicThis page intentionally blank.
12-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003PWM Interface12This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 13-1Copyright Cirrus Logic, Inc. 2003131313Chapter 1313Dedicated LED FlasherIntroductionLED flasher provides a u
13-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Dedicated LED Flasher13Register DefinitionsLED Flasher Register (LEDFLSH)Ad
EP7309/11/12 User’s Manual - DS508UM4 14-1Copyright Cirrus Logic, Inc. 2003141414Chapter 1414JTAG InterfaceIntroductionEmbeddedICE®is an extension to
14-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003JTAG Interface14Boundary ScanIEEE 1149.1 compliant JTAG is provided with th
EP7309/11/12 User’s Manual - DS508UM4 14-3Copyright Cirrus Logic, Inc. 2003JTAG Interface141414Debug ModesThe EP73xx supports a number of hardware act
14-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003JTAG Interface14state will produce the correct frequencies as shown in Tabl
EP7309/11/12 User’s Manual - DS508UM4 14-5Copyright Cirrus Logic, Inc. 2003JTAG Interface141414This test is not intended to be used when LCD DMA acces
14-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003JTAG Interface14This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 15-1Copyright Cirrus Logic, Inc. 2003151515Chapter 1515SSI PortIntroductionThe EP73xx provides two synchronous s
EP7309/11/12 User’s Manual - DS508UM4 xiCopyright Cirrus Logic, Inc. 2003List of TablesTable 1-1: EP73xx Memory Map in External Boot Mode ...
15-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SSI Port15CFGBYTE EQU 0x83 ; channel 1 data for ADC data requestTXLENGTH EQ
EP7309/11/12 User’s Manual - DS508UM4 15-3Copyright Cirrus Logic, Inc. 2003SSI Port151515interfaced to DSP style converters such as the Analog Devices
15-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SSI Port15SSI Port Register DescriptionsSynchronous Serial ADC Interface Da
EP7309/11/12 User’s Manual - DS508UM4 15-5Copyright Cirrus Logic, Inc. 2003SSI Port151515ADC Configuration Extension:When the ADCCON control bit in th
15-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SSI Port15This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 16-1Copyright Cirrus Logic, Inc. 2003161616Chapter 1616DAI/CODEC/SSI2IntroductionThe second channel is connected
16-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216Block DiagramDAI/CODEC/SSI2 Register ListProgramming Exampl
EP7309/11/12 User’s Manual - DS508UM4 16-3Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616ldr r1, =DAISELstr r1, [r12, #0x100] ; Select DAI in SY
16-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216DAI InterfaceThe DAI (Digital Audio Interface) is the buffe
EP7309/11/12 User’s Manual - DS508UM4 16-5Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616DAI Clock GenerationThe DAI contains a series of progra
EP7309/11/12 User’s Manual - DS508UM4 xiiCopyright Cirrus Logic, Inc. 2003Table 16-6: Programmable Audio Divisors at 90 MHz ...
16-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216*+0.23% Sample Frequency Error** Optional 12.288 MHz extern
EP7309/11/12 User’s Manual - DS508UM4 16-7Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616Data is read and written from the DAI data register for
16-8 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216Data on the link is sent MSB first and coincides with an ap
EP7309/11/12 User’s Manual - DS508UM4 16-9Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616item that has been popped to the top of the FIFO will b
16-10 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216will begin one clock, or more, after the last byte transfe
EP7309/11/12 User’s Manual - DS508UM4 16-11Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616causes the sync and interrupt generation logic to beco
16-12 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216DAI Control Register (DAIR)Address: 0x8000.2000, Read / Wr
EP7309/11/12 User’s Manual - DS508UM4 16-13Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616Full Bit DescriptionsDAIEN:When the DAI is disabled, a
16-14 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216RCTM: The Left Channel Sample Receive FIFO interrupt mask
EP7309/11/12 User’s Manual - DS508UM4 16-15Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616Data Write: Data is received by the DAI from the syste
EP7309/11/12 User’s Manual - DS508UM4 xiiiCopyright Cirrus Logic, Inc. 2003
16-16 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216DAI Data Register 2 (DAIDR2)Address: 0x8000.2080, Read / W
EP7309/11/12 User’s Manual - DS508UM4 16-17Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616LCTS: Left Channel Transmit FIFO Service Request Flag
16-18 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216Full Bit DescriptionsRCTS:The RightChannel Transmit FIFO S
EP7309/11/12 User’s Manual - DS508UM4 16-19Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616down to the bottom, the Right Channel Transmit logic u
16-20 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216RCNE: The Right Channel Receive FIFO Not Empty Flag (RCNEL
EP7309/11/12 User’s Manual - DS508UM4 16-21Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI2161616buffer.Data from this buffer is then serialized and se
16-22 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003DAI/CODEC/SSI216This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 17-1Copyright Cirrus Logic, Inc. 2003171717Chapter 1717UART and SIR EncoderIntroductionThe EP73xx provides three
17-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003UART and SIR Encoder17;ldr r1, =UART1str r1, [r12, #0x04C0] ; UART1 Configu
EP7309/11/12 User’s Manual - DS508UM4 17-3Copyright Cirrus Logic, Inc. 2003UART and SIR Encoder171717UART1UART 1 supports threemodem control signalsCT
EP7309/11/12 User’s Manual - DS508UM4 1-1Copyright Cirrus Logic, Inc. 2003111Chapter 11IntroductionOverviewThis chapter describes the EP73xx ARM proce
17-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003UART and SIR Encoder17enabled) is half-empty. Same condition applies during
EP7309/11/12 User’s Manual - DS508UM4 17-5Copyright Cirrus Logic, Inc. 2003UART and SIR Encoder171717UART and SIR Encoder Register DescriptionsUART Da
17-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003UART and SIR Encoder17Bit Rate and Line Control Registers (UBRLCR1 and UBRL
EP7309/11/12 User’s Manual - DS508UM4 17-7Copyright Cirrus Logic, Inc. 2003UART and SIR Encoder17171701 6 bits10 7 bits11 8 bitsTable 17-5: Word Lengt
17-8 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003UART and SIR Encoder17This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 A-1Copyright Cirrus Logic, Inc. 2003AAAAppendix AABoot Code00000000 uart_boot_base00000000 E3A0C102 MOV r12, #Hw
A-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Boot CodeA0000003C E3110501 TST r1, #Hw_URXFE100000040 1AFFFFFC BNE uart_rea
EP7309/11/12 User’s Manual - DS508UM4 Index-1Copyright Cirrus Logic, Inc. 2003 1IndexIndexBBoot ModeExternal 6-2Internal 6-2CCache 2-5clocksCPU 2-9Ext
Index-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003IndexTLB 2-5UUART 1-11WWrite Buffer 2-6
1-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Introduction1• Two 16-bit general purpose timer counters• 32-bit RTC (Real-T
EP7309/11/12 User’s Manual - DS508UM4 1-3Copyright Cirrus Logic, Inc. 2003Introduction111Internal Register MapTable 1-2 on page 1-4 shows the Internal
1-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Introduction1Note: All byte-wide registers should be accessed as words (exce
EP7309/11/12 User’s Manual - DS508UM4 1-5Copyright Cirrus Logic, Inc. 2003Introduction1110x8000.0540 PALLSW 0 RW 32 Least significant 32-bit word of L
ii EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003EP73xx User’s Guide Change Control Log22 Jan 2004Reason for entryThe Users Gu
1-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Introduction1Pin DescriptionTable 1-4 on page 1-7 describes the function ofa
EP7309/11/12 User’s Manual - DS508UM4 1-7Copyright Cirrus Logic, Inc. 2003Introduction111External Signal FunctionsTable 1-4: External Signal Functions
1-8 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Introduction1External Clock EXPCLK I/OExpansion clock rate is the same as th
EP7309/11/12 User’s Manual - DS508UM4 1-9Copyright Cirrus Logic, Inc. 2003Introduction111ADCInterface(SSI1)ADCCLK O Serial clock outputnADCCS O Chip s
1-10 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Introduction11. All deglitched inputs are via the 16.384 kHz clock. Each de
EP7309/11/12 User’s Manual - DS508UM4 1-11Copyright Cirrus Logic, Inc. 2003Introduction111Block DiagramsFigure 1-1. EP73xx Block Diagram32.768-kHzOSCI
1-12 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Introduction1References• ARM720T Technical Reference Manual, Revision 3 (AR
EP7309/11/12 User’s Manual - DS508UM4 2-1Copyright Cirrus Logic, Inc. 2003222Chapter 22CPU CoreIntroductionThe 7312 processor utilizes the ARM720T whi
2-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2Block DiagramDetailed block diagram of the core is shown below.Prog
EP7309/11/12 User’s Manual - DS508UM4 2-3Copyright Cirrus Logic, Inc. 2003CPU Core222;ldr r0, =0x55555555mcr p15, 0, r0, c3, c0 ; co-processor registe
EP7309/11/12 User’s Manual - DS508UM4 iiiCopyright Cirrus Logic, Inc. 2003
2-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2Operational OverviewUsing the Von Neumann (load/store) architecture
EP7309/11/12 User’s Manual - DS508UM4 2-5Copyright Cirrus Logic, Inc. 2003CPU Core222TLBThe TLB (Translation look-aside Buffer) is a 64-entry associat
2-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2Cache is direct-mapped. The copy of the address or data is stored a
EP7309/11/12 User’s Manual - DS508UM4 2-7Copyright Cirrus Logic, Inc. 2003CPU Core222Debug InterfaceJTAG (Joint Test Action Group) or IEEE 1149 provid
2-8 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2User mode in Thumb state generally limits access to r0-r7. There ar
EP7309/11/12 User’s Manual - DS508UM4 2-9Copyright Cirrus Logic, Inc. 2003CPU Core222CPU ClocksThere are two clocks required to maintain any of the pr
2-10 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2• Start-up resistor is not necessary. One is provided internally.•
EP7309/11/12 User’s Manual - DS508UM4 2-11Copyright Cirrus Logic, Inc. 2003CPU Core222internal PLL clock so adjustments and consideration will need to
2-12 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2internal PLL is notused. The defaultvalue “00”for the PLL setting
EP7309/11/12 User’s Manual - DS508UM4 2-13Copyright Cirrus Logic, Inc. 2003CPU Core222logic (CLKEN) pin can be used to disable external oscillator if
EP7309/11/12 User’s Manual - DS508UM4 iiiCopyright Cirrus Logic, Inc. 20031ContentsTable of ContentsChapter 1. IntroductionOverview...
2-14 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2The following register will allow the system software to put the p
EP7309/11/12 User’s Manual - DS508UM4 2-15Copyright Cirrus Logic, Inc. 2003CPU Core2222. OncenPOR goes high,the EP73xx will enter Standby State. In th
2-16 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003CPU Core2This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 3-1Copyright Cirrus Logic, Inc. 2003333Chapter 33TimersIntroductionEP73xx has three general purpose timers that
3-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Timers3str r1, [r12, #0x0100] ; Prescale - 2 kHz clockldr r1, =TC1Timerstr r
EP7309/11/12 User’s Manual - DS508UM4 3-3Copyright Cirrus Logic, Inc. 2003Timers333Prescale ModeAny value written to TC1 or TC2 is automatically re-lo
3-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Timers3Real Time Clock Match Register (RTCMR)Address: 0x8000.03C0, Read/Wri
EP7309/11/12 User’s Manual - DS508UM4 4-1Copyright Cirrus Logic, Inc. 2003444Chapter 44Interrupt ControllerIntroductionLike most modern microprocessor
4-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Interrupt Controller4Programming ExamplesENTRY;ldr r15, ResetVldr r15, Undef
EP7309/11/12 User’s Manual - DS508UM4 4-3Copyright Cirrus Logic, Inc. 2003Interrupt Controller444bne nextstatuscheck ; not the timer - moving down the
iv EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003ContentsTimer Register Descriptions...
4-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Interrupt Controller4Interrupt Types and PrioritiesThe EP73xx interrupt cont
EP7309/11/12 User’s Manual - DS508UM4 4-5Copyright Cirrus Logic, Inc. 2003Interrupt Controller444Interrupt ListingTable 4-4, Table 4-5,andTable 4-6 sh
4-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Interrupt Controller4Interrupt Latencies in Different StatesOperating StateT
EP7309/11/12 User’s Manual - DS508UM4 4-7Copyright Cirrus Logic, Inc. 2003Interrupt Controller444Standby StateThe Standby State equates to the system
4-8 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Interrupt Controller4Interrupt Register DescriptionsInterrupt Status Registe
EP7309/11/12 User’s Manual - DS508UM4 4-9Copyright Cirrus Logic, Inc. 2003Interrupt Controller444MCINT: Media changed interrupt. This interrupt will b
4-10 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Interrupt Controller4UTXINT1: Internal UART1 transmit FIFO half-empty inter
EP7309/11/12 User’s Manual - DS508UM4 4-11Copyright Cirrus Logic, Inc. 2003Interrupt Controller444Interrupt Status Register 2 (INTSR2)Address: 0x8000.
4-12 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Interrupt Controller4URXINT2: UART2 receive FIFO half full interrupt. The f
EP7309/11/12 User’s Manual - DS508UM4 4-13Copyright Cirrus Logic, Inc. 2003Interrupt Controller444Interrupt Mask Register 3 (INTMR3)Address: 0x8000.22
EP7309/11/12 User’s Manual - DS508UM4 vCopyright Cirrus Logic, Inc. 2003 ContentsChapter 6. Processor SupportIntroduction...
4-14 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Interrupt Controller4TC1 End of Interrupt (TC2EOI) Address: 0x8000.0700Defi
EP7309/11/12 User’s Manual - DS508UM4 5-1Copyright Cirrus Logic, Inc. 2003555Chapter 55System RegistersIntroductionThe SYSCON and SYSFLG registers con
5-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003System Registers5System Register ListProgramming Example;*******************
EP7309/11/12 User’s Manual - DS508UM4 5-3Copyright Cirrus Logic, Inc. 2003System Registers555Operational OverviewMost of the functions represented in
5-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003System Registers5MaverickKey™ Unique-IDMaverickKey registers are unique ID n
EP7309/11/12 User’s Manual - DS508UM4 5-5Copyright Cirrus Logic, Inc. 2003System Registers555TC1M: Timer counter 1 mode. Setting this bit sets TC1 clo
5-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003System Registers5ADCKSEL: Microwire/SPI peripheral clock speed select. This
EP7309/11/12 User’s Manual - DS508UM4 5-7Copyright Cirrus Logic, Inc. 2003System Registers555System Control Register 2 (SYSCON2)Address: 0x8000.1100,
5-8 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003System Registers5SS2MAEN: Master mode enable for the synchronous serial inte
EP7309/11/12 User’s Manual - DS508UM4 5-9Copyright Cirrus Logic, Inc. 2003System Registers555Refer to the Expansion Bus Controller chapterfor explicit
vi EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003ContentsChapter 11. General Purpose I/O (GPIO)Introduction...
5-10 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003System Registers5Bit Descriptions:MCDR: Media changed direct read. This bit
EP7309/11/12 User’s Manual - DS508UM4 5-11Copyright Cirrus Logic, Inc. 2003System Registers555URXFE1: UART1 receiver FIFO empty. The meaning of this b
5-12 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003System Registers5System Flag Register 2 (SYSFLG2)Address: 0x8000.1140, Read
EP7309/11/12 User’s Manual - DS508UM4 5-13Copyright Cirrus Logic, Inc. 2003System Registers555URXFE2: UART2 receiver FIFO empty. The meaning of this b
5-14 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003System Registers5This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 6-1Copyright Cirrus Logic, Inc. 2003666Chapter 66Processor SupportIntroductionThe EP73xx processor has an intern
6-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Processor Support6Internal Boot ModeThe 128 bytes of on-chip Boot ROM contai
EP7309/11/12 User’s Manual - DS508UM4 6-3Copyright Cirrus Logic, Inc. 2003Processor Support666External ROM i.e., FLASH or EEPROM will be configured fo
6-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Processor Support6EndianessThe EP73xx uses little endian configuration for t
EP7309/11/12 User’s Manual - DS508UM4 6-5Copyright Cirrus Logic, Inc. 2003Processor Support666Note: Bold indicates active byte lane.Values seen above
EP7309/11/12 User’s Manual - DS508UM4 viiCopyright Cirrus Logic, Inc. 2003 ContentsOperational Overview...
6-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003Processor Support6This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 7-1Copyright Cirrus Logic, Inc. 2003777Chapter 77SDRAM ControllerIntroductionExternal SDRAM on the EP7311 and EP
7-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SDRAM Controller7Programming Example;***************************************
EP7309/11/12 User’s Manual - DS508UM4 7-3Copyright Cirrus Logic, Inc. 2003SDRAM Controller777The SDRAM controller will continue to provide refresh cyc
7-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SDRAM Controller7SDWIDTH[1:0]: The width of each SDRAM device:00 = 4 bits01
EP7309/11/12 User’s Manual - DS508UM4 8-1Copyright Cirrus Logic, Inc. 2003888Chapter 88SRAM/Expansion Bus ControllerIntroductionThe SRAM/Expansion bus
8-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SRAM/Expansion Bus Controller8MemConfig1value EQU 0x3c011814 ; CS0-CS3 confi
EP7309/11/12 User’s Manual - DS508UM4 8-3Copyright Cirrus Logic, Inc. 2003SRAM/Expansion Bus Controller888SRAM / Expansion Bus Register DescriptionsMe
8-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SRAM/Expansion Bus Controller8Wait States Field[2:5]:There aretwotablestouse
EP7309/11/12 User’s Manual - DS508UM4 8-5Copyright Cirrus Logic, Inc. 2003SRAM/Expansion Bus Controller888SQAEN[6]: Sequentialaccess enable. Settingth
viii EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003ContentsThis page intentionally blank.
8-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003SRAM/Expansion Bus Controller8This page intentionally blank.
EP7309/11/12 User’s Manual - DS508UM4 9-1Copyright Cirrus Logic, Inc. 2003999Chapter 99LCD InterfaceIntroductionThe LCD interface provides all the nec
9-2 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003LCD Interface9Programming Example;******************************************
EP7309/11/12 User’s Manual - DS508UM4 9-3Copyright Cirrus Logic, Inc. 2003LCD Interface999The frame buffer start address begins with 0x0000000 within
9-4 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003LCD Interface9Latency and access times will need tobe calculated priorto sel
EP7309/11/12 User’s Manual - DS508UM4 9-5Copyright Cirrus Logic, Inc. 2003LCD Interface999Figure 9-1. Pixel Gray Scale MappingPixel 1 Pixel 2 Pixel 3
9-6 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003LCD Interface9Hardware InterfaceDD3-DD0 carries the data that is output from
EP7309/11/12 User’s Manual - DS508UM4 9-7Copyright Cirrus Logic, Inc. 2003LCD Interface999LCD Register DescriptionsLCD Control Register (LCDCON) Addre
9-8 EP7309/11/12 User’s Manual - DS508UM4Copyright Cirrus Logic, Inc. 2003LCD Interface9GSEN[30]: Gray scale enable bit. Enables gray scale output to
EP7309/11/12 User’s Manual - DS508UM4 9-9Copyright Cirrus Logic, Inc. 2003LCD Interface999LCD Frame Buffer Start Address (FBADDR) Address: 0x8000.1000
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