Cirrus-logic AN186 Manuel d'utilisateur

1Copyright  Cirrus Logic, Inc. 2000(All Rights Reserved)P.O. Box 17847, Austin, Texas 78760(512) 445 7222 FAX: (512) 445 7581http://www.cirrus.comA

AN186 10 AN186REV1C. PLL Clock with “CLKEN” on “RUN/CLKEN” pinD. PLL Clock with “RUN” on “RUN/CLKEN” Pin Internal RUNInstruction fetchesWAKEUP (inpu

AN186AN186REV1 11 9. AUTOMATIC WAKEUP CIRCUITU2123C10.1uFUnusedGPIO pinR247kR147kU1A1214774LCX02WAKEUP74LCX14VddWAKEUP_DISFigure 8. Automatic Wakeup

AN186 2 AN186REV1TABLE OF CONTENTS1. INTRODUCTION ...

AN186AN186REV1 3 1. INTRODUCTIONThis application note describes in detail the recommended procedure for applying power to the EP72/73XX device, and ho

AN186 4 AN186REV14.1 Power-up Delay - 100usUpon power-up, the EP72/73XX is in an unknown state. It must first be reset by the power-on reset signal (n

AN186AN186REV1 5 Notes: 1. The use of the keypress interrupt is disabled after any of the three available resets become active (i.e. nPOR, nURESET, or

AN186 6 AN186REV15. LOCK-OUT PERIOD DELAYSThese delays can be described as the amount of delay from when the WAKEUP signal first rises, until the CPU

AN186AN186REV1 7 7. WAKEUP AND nURESET CAVEATWhen the WAKEUP signal is used to exit the Standby State, nURESET must be held in its inactive state. Dur

AN186 8 AN186REV18. TIMING DIAGRAMS8.1 Timing Diagram in the case of a Cold BootNotes: 1. nPOR (active low) should be held low until the power supply

AN186AN186REV1 9 8.2 Timing Diagrams for the Case of Wakeup from Standby StateA. External OSC(13Mhz) with “CLKEN” on “RUN/CLKEN” pinNote: In Figure 4,