Cirrus-logic CS4351 Manuel d'utilisateur

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Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
http://www.cirrus.com
192 kHz Stereo DAC with 2 Vrms Line Out
Features
! Multi-Bit Delta-Sigma Modulator
! 24-Bit Conversion
! Up to 192 kHz Sample Rates
! 112 dB Dynamic Range
! -100 dB THD+N
! +3.3 V, +9 to 12 V, and VL Power Supplies
! 2 Vrms Output into 5 k AC Load
! Digital Volume Control with Soft Ramp
119 dB Attenuation
1/2 dB Step Size
Zero Crossing Click-Free Transitions
! ATAPI Mixing
! Low Clock Jitter Sensitivity
! Popguard
®
Technology for Control of Clicks
and Pops
Description
The CS4351 is a complete stereo digital-to-analog sys-
tem including digital interpolation, fifth-order multi-bit
delta-sigma digital-to-analog conversion, digital de-em-
phasis, volume control, channel mixing, analog filtering,
and on-chip 2 Vrms line-level driver. The advantages of
this architecture include ideal differential linearity, no
distortion mechanisms due to resistor matching errors,
no linearity drift over time and temperature, high toler-
ance to clock jitter, and a minimal set of external
components.
The CS4351 is available in a 20-pin TSSOP package in
both Commercial (-10°C - +70°C) and Automotive
grades (-40°C to +85°C). The CDB4351 Customer
Demonstration board is also available for device evalu-
ation and implementation suggestions. Please see
“Ordering Information” on page 37 for complete details.
These features are ideal for cost-sensitive, 2-channel
audio systems including DVD players, A/V receivers,
set-top boxes, digital TVs and VCRs, mini-component
systems, and mixing consoles.
PCM
Ser i al
Interface
Interpolation
Fi l t er wi t h
Volume Control
Internal Voltage
Ref er ence
Ext e r nal
Mute
Cont r ol
DAC
e
rial Audio Input
Left and Right
Mute Controls
2 Vrms Line Level
Right Channel
Output
2 Vrms Line Level
Left Channel Outp
u
Reset
8
V to 3.3V
DAC
Register/Hardware
Configuration
Level Translator
d
ware or I
2
C/ S PI
Cont r ol Dat a
Multibit
∆Σ Modulator
3.3 V
9 V to 12 V
Interpolation
Fi l t er wi t h
Volume Contr ol
Amp
+
Filter
Amp
+
Filter
Aut o Speed Mode
Det ect
Multibit
∆Σ Modulator
DECEMBER '05
DS566F1
CS4351
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1 2 3 4 5 6 ... 36 37

Résumé du contenu

Page 1 - Description

Copyright © Cirrus Logic, Inc. 2005(All Rights Reserved)http://www.cirrus.com192 kHz Stereo DAC with 2 Vrms Line OutFeatures! Multi-Bit Delta-Sigma Mo

Page 2 - TABLE OF CONTENTS

10 DS566F1CS4351SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE Parameters Symbol Min Max UnitsMCLK Frequency 1.024 51.2 MHzMCLK Duty Cycle 4

Page 3 - LIST OF FIGURES

DS566F1 11CS4351Switching Characteristics - Control Port - I²C® Format(Inputs: Logic 0 = GND, Logic 1 = VL, CL=20pF)Notes:7. Data must be held for suf

Page 4 - LIST OF TABLES

12 DS566F1CS4351SWITCHING CHARACTERISTICS - CONTROL PORT - SPI™ FORMAT (Inputs: Logic 0 = GND, Logic 1 = VL, CL=20pF)Notes:8. tspi only needed before

Page 5 - 1. PIN DESCRIPTION

DS566F1 13CS4351DIGITAL CHARACTERISTICSPOWER AND THERMAL CHARACTERISTICS Notes:11. Current consumption increases with increasing FS and increasing MCL

Page 6 - ABSOLUTE MAXIMUM RATINGS

14 DS566F1CS43513. TYPICAL CONNECTION DIAGRAM16DigitalAudioSourceVLGNDCS4351MCLKVDAOUTA1170.1 µF+10 µF+3.3 V *µ C/ModeConfiguration9108SDIN2DIF1(SCL/C

Page 7 - DAC ANALOG CHARACTERISTICS

DS566F1 15CS43514. APPLICATIONS4.1 Sample Rate Range/Operational Mode DetectThe device operates in one of three operational modes. The allowed sample

Page 8

16 DS566F1CS43514.3 Digital Interface FormatThe device will accept audio samples in 1 of 4 digital interface formats in Stand-Alone mode, as illustrat

Page 9

DS566F1 17CS4351least 32 cycles per LRCK period in format 2, 48 cycles in format 3, 40 cycles in format 4, and 36 cyclesin format 5. 4.4 De-Emphasis C

Page 10 - 10 DS566F1

18 DS566F1CS43514.4.1 Stand-Alone ModeWhen pulled to VL the DEM pin activates the 44.1 kHz de-emphasis filter. When pulled to GND the DEMpin turns off

Page 11

DS566F1 19CS43514.6.2 Power-DownTo prevent audible transients at power-down, the device must first enter its power-down state. When thisoccurs, audio

Page 12 - ™ FORMAT

2 DS566F1CS4351TABLE OF CONTENTS1. PIN DESCRIPTION ...

Page 13 - DIGITAL CHARACTERISTICS

20 DS566F1CS43514.9 Control Port InterfaceThe control port is used to load all the internal register settings (see Section 6). The operation of the co

Page 14 - 3. TYPICAL CONNECTION DIAGRAM

DS566F1 21CS43514.9.2.2 I²C ReadTo read from the device, follow the procedure below while adhering to the control port Switching Specifica-tions.1. In

Page 15 - 4. APPLICATIONS

22 DS566F1CS43514. Write the desired data to the register pointed to by the MAP.5. If the INCR bit (see Section 4.9.1) is set to 1, repeat the previou

Page 16 - 4.3.1 Stand-Alone Mode

DS566F1 23CS43515. REGISTER QUICK REFERENCEAddr Function 7 6 5 4 3 2 1 01h Chip ID PART4 PART3 PART2 PART1 PART0 REV2 REV1 REV0default 1 1 1 1 1 - - -

Page 17 - 4.4 De-Emphasis Control

24 DS566F1CS43516. REGISTER DESCRIPTION** All register access is R/W unless specified otherwise**6.1 Chip ID - Register 01h Function:This register is

Page 18

DS566F1 25CS43516.2.3 Functional Mode (FM) Bits 1-0Default = 0000 - Auto speed mode detect01 - Single-Speed Mode (4 to 50 kHz sample rates)10 - Double

Page 19 - 4.8.1 Capacitor Placement

26 DS566F1CS43516.3.4 ATAPI Channel Mixing and Muting (ATAPI3:0) Bits 3-0Default = 1001 - AOUTA=aL, AOUTB=bR (Stereo)Function:The CS4351 implements th

Page 20 - 4.9.2.1 I²C Write

DS566F1 27CS43516.4 Mute Control - Register 04h 6.4.1 Auto-Mute (AMUTE) Bit 7Function:When set to 1 (default), the Digital-to-Analog converter output

Page 21 - 4.9.3.1 SPI Write

28 DS566F1CS43516.5.1 Digital Volume Control (VOL7:0) Bits 7-0Default = 00h (0 dB) Function:The Digital Volume Control registers allow independent con

Page 22 - 00000000

DS566F1 29CS4351Soft Ramp and Zero CrossSoft Ramp and Zero Cross Enable dictate that signal level changes, either by attenuation changes or mut-ing, w

Page 23 - 5. REGISTER QUICK REFERENCE

DS566F1 3CS43516.3.4 ATAPI Channel Mixing and Muting (ATAPI3:0) Bits 3-0 ... 266.4 Mute Control - Regi

Page 24 - 6. REGISTER DESCRIPTION

30 DS566F1CS43516.7.1 Power Down (PDN) Bit 7Function:When set to 1 (default), the entire device will enter a low-power state and the contents of the c

Page 25 - 00001001

DS566F1 31CS43517. DIGITAL FILTER RESPONSE PLOTS 0.4 0.5 0.6 0.7 0.8 0.91−120−100−80−60−40−200Frequency(normalized to Fs)Amplitude (dB)0.4 0.42 0.44

Page 26 - Table 8. ATAPI Decode

32 DS566F1CS4351 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−0.02−0.015−0.01−0.00500.0050.010.0150.02Frequency(normalized to Fs)Amplitude (dB)0.4

Page 27

DS566F1 33CS4351 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.91120100806040200Frequency(normalized to Fs)Amplitude (dB)0.2 0.3 0.4 0.5 0.6 0.7 0.8120100806040200F

Page 28

34 DS566F1CS4351 0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55109876543210Frequency(normalized to Fs)Amplitude (dB)0 0.05 0.1 0.15 0.2 0.250

Page 29 - 10000000

DS566F1 35CS43518. PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all other

Page 30 - 6.7.1 Power Down (PDN) Bit 7

36 DS566F1CS43519. PACKAGE DIMENSIONS Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold

Page 31 - DS566F1 31

DS566F1 37CS435110.ORDERING INFORMATION11.REVISION HISTORYProduct Description Package Pb-Free Grade Temp Range Container Order #CS4351192 kHz Stereo D

Page 32 - 32 DS566F1

4 DS566F1CS4351Figure 29.Quad-Speed (fast) Stopband Rejection... 33F

Page 33 - DS566F1 33

DS566F1 5CS43511. PIN DESCRIPTION Pin Name # Pin DescriptionSDIN 1 Serial Audio Data Input (Input) - Input for two’s complement serial audio data.

Page 34 - 34 DS566F1

6 DS566F1CS43512. CHARACTERISTICS AND SPECIFICATIONS (Min/Max performance characteristics and specifications are guaranteed over the Specified Operati

Page 35 - 8. PARAMETER DEFINITIONS

DS566F1 7CS4351DAC ANALOG CHARACTERISTICS(Test conditions (unless otherwise specified): input test signal is a 997 Hz sine wave at 0 dBFS; measurement

Page 36 - 9. PACKAGE DIMENSIONS

8 DS566F1CS4351COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE(The filter characteristics have been normalized to the sample rate (Fs) and

Page 37 - 11.REVISION HISTORY

DS566F1 9CS4351COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE(Continued)Notes:2. Slow Roll-off interpolation filter is only available in

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