Cirrus-logic CS4391 Manuel d'utilisateur télécharger pdf (Page 20)

CS4391

20 DS335PP4

4.5.5 Freeze (Bit 2)

Function:

This function allows modifications to the registers without the changes being taking effect until Freeze

is disabled. To make multiple changes in the Control port registers take effect simultaneously, set the

Freeze Bit, make all register changes, then Disable the Freeze bit.

4.5.6 Master Clock Divide (Bit 1)

Function:

This function allows the user to select an internal divide by 2 of the Master Clock. This selection is

required to access the higher Master Clock rates as shown in Table 9.

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 37 38

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Cirrus-logic CS4391 Manuel d'utilisateur Page 20