Cirrus-logic CS42L55 Manuel d'utilisateur télécharger pdf (Page 30)

30 DS773F1

CS42L55

When the charge pump transitions from the higher set of rail voltages to the lower set, there is a one sec-

ond delay before the charge pump supplies the lower rail voltages to the amplifiers. This hysteresis en-

sures that the charge pump doesn't toggle between the two rail voltages as signals approach the clip

threshold. It also prevents clipping in the instance of repetitive high level transients in the input signal. The

timing diagram for this transitional behavior is detailed in Figure 16.

+VCP

-VCP

+VCP

Ideal Transition

Actual Transition caused

by VHPFILT Capacitor

Actual Transition caused

by VHPFILT Capacitor

Time

Figure 15. VHPFILT Transitions

Output Level

-10 dB

VCP

- VCP

Amplifier Rail

Voltage

1 second

Time

Figure 16. VHPFILT Hysteresis

1 2 ... 25 26 27 28 29 30 31 32 33 34 35 ... 72 73

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Cirrus-logic CS42L55 Manuel d'utilisateur Page 30