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Application Note

Link Capacitor Considerations

for CS1601 Applications

1. Introduction

Cirrus Logic's CS1601 is a digital power factor correction (PFC) controller engineered to deliver the lowest system

cost when designing electronic ballast and LED applications. The CS1601 digital controller is tailored for power con-

verter applications that use low-capacitance values on the link output, generally an electrolytic type. In some cases,

the limitations of an electrolytic life cycle may require the use of other capacitor types. This application note contains

an analysis of the use of film capacitors as an alternative that can increase the lifetime of the power converter sys-

tem. This document first explains how to calculate the link output capacitance and then presents a design example

to validate system performance.

2. Design Considerations

The capacitance of the link voltage capacitor is dependent on several parameters in a CS1601 controlled, PFC con-

verter. These parameters are as follows: system stability, link voltage ripple, RMS current in the capacitor, and hold-

up time. This application note’s step-by-step design example will permit the customer to choose the smallest capac-

itance possible for the link voltage capacitor and still meet all system requirements.

2.1 System Stability

To ensure system stability, the recommended capacitance-per-watt ratio of the link voltage capacitor should be

within the range of 0.25F/watt to 0.5F/watt when V

link

= 460VAC. The capacitance-per-watt ratio range is

defined by the digital IC control algorithm. When using the CS1601 controller, it is not recommended to design

a PFC circuit using ratios outside the range stated above.

The V

link

voltage is controlled by adjusting the sensing resistors that connect the IC to the V

rect

and

link

voltages. If the specified V

link

voltage is altered, the link voltage capacitance should also be adjusted to

maintain system stability. The equation below is used to verify the capacitance-per-watt ratio:

2.2 Link Voltage Ripple

To meet the link output voltage ripple requirements, the following equation defines the size of the

output capacitor:

Where:

line(min)

= the minimum line frequency the PFC design is required to support

link

= the nominal DC output voltage from the PFC

V

link(rip)

= the output voltage ripple requirement in the volts, peak-to-peak

link ratio

0.25 0.5~

460

link

-------------

Fwatt=

[Eq. 1]

out rip

2 f

line min

link

V

link rip



----------------------------------------------------------------------------------------

[Eq. 2]

AN361

OCT’11

AN361REV2

1 2 3 4 5 6 7 8 9 10

Résumé du contenu

Page 1 - Link Capacitor Considerations

Page 2

AN36110 AN361REV2Contacting Cirrus Logic SupportFor all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one neare

Page 3 - 4. Design Example

AN3612 AN361REV22.3 Voltage Separation Between Vline and VlinkTo ensure proper operation as a boost converter, a minimum voltage separation of 16V bet

Page 4

AN361AN361REV2 33. Film Capacitor Used in CS1601The value of the link capacitor used in CS1601 is usually small, and in those cases the electrolytic c

Page 5 - AN361REV2 5

AN3614 AN361REV2Step 3) Voltage Separation Between Vline and VlinkThe peak value of the line voltage is . Use Equation 4 to calculate the voltage sep

Page 6 - 6 AN361REV2

AN361AN361REV2 55. Comparing the Frequency ProfilesThe steady-state and load-transient performance at 110VAC and 220VAC are illustrated in Figures 1 t

Page 7 - AN361REV2 7

AN3616 AN361REV2Figure 2. Steady-State Waveform (220VAC)Figure 3. Load Transient - 4W to 40W at 1W/Sec (110VAC)

Page 8 - 6. Summary

AN361AN361REV2 7.Figure 4. Load Transient - 40W to 4W at 1W/Sec (110VAC).Figure 5. Load Transient - 4W to 40W at 1W/Sec (220VAC)

Page 9 - Revision History

AN3618 AN361REV2.Figure 6. Load Transient - 40W to 4W at 1W/Sec (220VAC)6. SummaryLink capacitor design considerations when using the CS1601 are det

Page 10 - 10 AN361REV2

AN361AN361REV2 9Revision History Revision Date ChangesREV1 SEP 2011 Initial Release.REV2 OCT 2011 Change to Equation 8.

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Cirrus-logic AN361 Manuel d'utilisateur

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