Cirrus-logic CRD4202-1 Manuel d'utilisateur télécharger pdf (Page 14)

CRD4202-1

14 DS549RD1A1

R51

NO POP

C68

NO POP

C69

NO POP

R52

NO POP

R53

NO POP

2 4

DGND DGND

+3.3VD

DGND

XTAL_OUT

XTAL_IN

ID1#

ID0#

For PLL operation:

OPTIONAL PLL (Phase Locked Loop)

Populate R54 = 1K

DO NOT populate: Y1, C14, C15, and R55

Apply external oscillator to XTAL_IN (pin 2)

(CRD4202-1 can use test oscillator on Y2: ECS-8FA3)

Populate R51, R52, R53, C68, and C69 according to

your input clock rate:

clock rate (MHz) R51 R52 R53 C68 C69

14.31818 2.2K NO POP 0 ohm 0.022uF 220pF

24.576 NO POP NO POP NO POP NO POP NO POP

27 2.2K 0 ohm NO POP 0.022uF 220pF

48 2.2K 0 ohm 0 ohm 0.022uF 220pF

Test Clock Only

Figure 8. Phase Locked Loop

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 23 24

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Cirrus-logic CRD4202-1 Manuel d'utilisateur Page 14