Cirrus-logic CS48LV13 Manuel d'utilisateur

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Copyright Cirrus Logic, Inc. 2014
(All Rights Reserved)
http://www.cirrus.com
DS1057F1
FEB ‘14
Ultralow Power HD Voice Processors,
Featuring SoundClear® Technology
Overview of Features
Complete easy-to-implement voice solution including all
essential voice, audio, and speech DSP features for
flagship smartphones, tablets, and computing products
SoundClear Voice™ noise reduction, echo cancellation,
and voice enhancement
RAPID2™ GUI-based diagnostic and tuning tool for ease
of design-in
Media postprocessing support
—Integrated Cirrus Logic playback enhancement for
speakers and headphones
—Optional Dolby® and DTS® playback enhancement
1
ASR Enhance™ automatic speech recognition (ASR)
preprocessing for increased ASR accuracy in noisy
environments
Voice activity detector (VAD) enables always-on speech
recognition
TrulyHandsfree™ voice control by Sensory, Inc.
supported
Powerful 130-MHz dual-MAC 32-bit DSP core
Ultralow power consumption (core typically <8 mW @ 1 V
during narrowband call)
•I
2
S, I
2
C, SPI™ digital connectivity
1. Use of TrulyHandsfree-, Dolby-, or DTS-supported features requires the existence and proof of a valid license agreement with the
corresponding company to be able to use or distribute its technology in any finished end-user or ready-to-use final product.
CS48LV12 Block Diagram
Codec
SoC or Application Processor
PGA
Noise
Reduction
Acoustic Echo Canceller
Residual Echo Suppressor
NLP
Spectrally Matched
Comfort Noise
Dynamic
FlexEQ
ALC PGA
Codec Port
Host Port
Full-Duplex Control + Voice Activity Detection + Double Talk Detection
PGA
Comfort
Noise
Automatic Volume
Control
Automatic Level
Control
Dynamic
FlexEQ
Noise
Reduction
PGA
Media Processor
GND V
D
V
L
Debug MCLK
I
2
S
Raw
PCM
I
2
S
Clean
PCM
RESET
BUSY
I
2
S
Clean
PCM
CLK
SPI/I
2
C
I
2
S
Raw
PCM
INT
Near
End
Far
End
Optional
CS48LV12/13
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Résumé du contenu

Page 1 - CS48LV12/13

Copyright  Cirrus Logic, Inc. 2014(All Rights Reserved)http://www.cirrus.comDS1057F1FEB ‘14Ultralow Power HD Voice Processors,Featuring SoundClear® T

Page 2 - SoundClear Voice™ Features

DS1057F1 10 3.9 Automatic Level Control (ALC)3.9 Automatic Level Control (ALC)Tx voice level can vary greatly based on talker loudness, product dista

Page 3

11 DS1057F13.13 Speech DSP Chain 3.13 Speech DSP Chain The CS48LV13 includes Cirrus Logic ASR Enhance preprocessor that removes noise impacting ASR e

Page 4 - General Description

DS1057F1 12 3.15 Power ManagementThe serial control port also includes a pin for flow control of the communications interface (BUSY/I2C_SELECT) and a

Page 5 - 2 Overview

13 DS1057F14 Characteristics and Specifications • Multi-mic noise reduction• Single-mic noise reduction• Audio detection and classification• AEC, incl

Page 6 - 3 Functional Description

DS1057F1 14 4.3 Power Supply Characteristics—1.0 V Power Dissipation4.3 Power Supply Characteristics—1.0 V Power DissipationTest Conditions (unless o

Page 7 - 3.2 Processing Groups

15 DS1057F14.5 Thermal Characteristics 4.5 Thermal Characteristics4.6 Digital Interface Specifications and CharacteristicsTest Conditions (unless oth

Page 8 - 3.5 Noise Reduction

DS1057F1 16 4.7 Switching Characteristics—RESET4.7 Switching Characteristics—RESETFigure 4-2. RESET Timing at Power-OnFigure 4-3. RESET Timing after P

Page 9 - 3.8 Dynamic PEQ

17 DS1057F14.9 Switching Characteristics—Internal Clock 4.9 Switching Characteristics—Internal Clock4.10 Switching Characteristics—Serial Control Por

Page 10 - 3.10 Rx Voice DSP Chain

DS1057F1 18 4.11 Switching Characteristics—Serial Control Port—I2C Slave ModeFigure 4-5. Serial Control Port—SPI Slave Mode Timing4.11 Switching Chara

Page 11 - 3.14 On-chip DSP Peripherals

19 DS1057F14.12 Switching Characteristics—Digital Audio Slave Input Port Figure 4-6. Serial Control Port—I2C Slave Mode Timing4.12 Switching Character

Page 12 - 3.15 Power Management

DS1057F1 2 CS48LV13 Block DiagramSoundClear Voice™ Features• Flexible and tunable enabling freedom in product ID, transducer placement and selection•

Page 13 - 4.1 Absolute Maximum Ratings

DS1057F1 20 4.13 Switching Characteristics—Digital Audio Output Port4.13 Switching Characteristics—Digital Audio Output PortFigure 4-8. Digital Audio

Page 14

21 DS1057F15 Pin Descriptions 5 Pin DescriptionsTop-Down (Through-Package)View 20-Ball WLCSP PackageA4A3A2A1B4B3B2B1DAO_D1DAI_D2 VDVLDAO_D2C2C1D2D1C4

Page 15 - 4.5 Thermal Characteristics

DS1057F1 22 5 Pin Descriptions Pin Name CSP Ball#QFN Pin#Pin FunctionsDAO_D1 A1 19 Digital Audio Data Output 1 (Host/Tx/Uplink) • (O) DAO output 1 fo

Page 16 - DS1057F1 16

23 DS1057F15.1 I/O Pin Characteristics 5.1 I/O Pin CharacteristicsInput and output levels and associated power supply voltage are shown in Table 5-1.

Page 17 - 17 DS1057F1

24 DS1057F16 Package Dimensions 6 Package DimensionsTable 6-1. WLCSP Package DimensionSymbol Description DimensionsA Total thickness 0.495 ±0.04S Waf

Page 18 - C Slave Mode

25 DS1057F16 Package Dimensions 7. Controlling dimensions are in millimeters. 8. Dimensioning and tolerancing per ASME Y 14.5M.9. Dimension “b” applie

Page 19 - MISO/SDA

DS1057F1 26 7 Ordering Information1. Controlling dimensions are in millimeters.2. Dimensioning and tolerancing per ASME Y 14.5M.3. This drawing confor

Page 20

3 DS1057F1 Cirrus Logic Speech Features(CS48LV13 Only)• ASR Enhance preprocessor for ASR engines—Improves speech command recognition of ASR engines i

Page 21 - 5 Pin Descriptions

DS1057F1 4 General DescriptionThe CS48LV12 and CS48LV13 ultralow power voice processors feature Cirrus Logic’s patented SoundClear® technology to pro

Page 22 - DS1057F1 22

5 DS1057F11 Documentation 1 DocumentationThis document describes the CS48LV12 and CS48LV13 HD voice processors. When evaluating or designing a system

Page 23 - 5.1 I/O Pin Characteristics

DS1057F1 6 2.1 LicensingA key feature of both products that enables ease of implementation, quick time to market and performance optimized to a partic

Page 24 - 6 Package Dimensions

7 DS1057F13.1 Cirrus Logic 32-bit DSP Core Figure 3-2. CS48LV13 Block Diagram3.1 Cirrus Logic 32-bit DSP CoreThe core is a high-performance, 32-bit,

Page 25

DS1057F1 8 3.3 Tx Voice DSP ChainThe CS48LV13 includes two additional processing groups:5. Speech DSP Chain6. Advanced Audio Playback DSP ChainCirrus

Page 26 - 8 Revision History

9 DS1057F13.6 Acoustic Echo Cancellation (AEC) adjustments to compensate for changes in device orientation. This results in better off-axis performanc

Modèles reliés CS48LV12

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